From 6768f39a4b5a5d6d1c2318f632f801fe1c8084cd Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Sat, 3 Oct 2009 16:24:58 +0000 Subject: Remove: - CONFIG_CBFS - anything that's conditional on CONFIG_CBFS == 0 - files that were only included for CONFIG_CBFS == 0 In particular: - elfboot - stream boot code - mini-filo and filesystems (depends on stream boot code) After this commit, there is no way to build an image that is not using CBFS anymore. Signed-off-by: Patrick Georgi Acked-by: Myles Watson Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/arch/i386/init/crt0.S.lb | 17 +------- src/arch/i386/init/ldscript.lb | 70 ------------------------------ src/arch/i386/init/ldscript_fallback.lb | 75 --------------------------------- 3 files changed, 2 insertions(+), 160 deletions(-) delete mode 100644 src/arch/i386/init/ldscript.lb delete mode 100644 src/arch/i386/init/ldscript_fallback.lb (limited to 'src/arch/i386/init') diff --git a/src/arch/i386/init/crt0.S.lb b/src/arch/i386/init/crt0.S.lb index 9e8968510d..95764ae596 100644 --- a/src/arch/i386/init/crt0.S.lb +++ b/src/arch/i386/init/crt0.S.lb @@ -74,19 +74,8 @@ __main: movl $0x4000000, %esp movl %esp, %ebp pushl %esi -#if CONFIG_CBFS == 1 pushl $str_coreboot_ram_name call cbfs_and_run_core -#else - movl $_liseg, %esi - movl $_iseg, %edi - movl $_eiseg, %ecx - subl %edi, %ecx - pushl %ecx - pushl %edi - pushl %esi - call copy_and_run_core -#endif .Lhlt: intel_chip_post_macro(0xee) /* post fe */ @@ -148,12 +137,10 @@ str_pre_main: .string "Jumping to coreboot.\r\n" #endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */ -#if CONFIG_CBFS == 1 -# if CONFIG_USE_FALLBACK_IMAGE == 1 +#if CONFIG_USE_FALLBACK_IMAGE == 1 str_coreboot_ram_name: .string "fallback/coreboot_ram" -# else +#else str_coreboot_ram_name: .string "normal/coreboot_ram" -# endif #endif #endif /* CONFIG_USE_DCACHE_RAM */ diff --git a/src/arch/i386/init/ldscript.lb b/src/arch/i386/init/ldscript.lb deleted file mode 100644 index 0ed5c47f53..0000000000 --- a/src/arch/i386/init/ldscript.lb +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Memory map: - * - * CONFIG_RAMBASE - * : data segment - * : bss segment - * : heap - * : stack - * CONFIG_ROMBASE - * : coreboot text - * : readonly text - */ -/* - * Bootstrap code for the STPC Consumer - * Copyright (c) 1999 by Net Insight AB. All Rights Reserved. - * - */ - -/* - * Written by Johan Rydberg, based on work by Daniel Kahlin. - * Rewritten by Eric Biederman - */ -/* - * We use ELF as output format. So that we can - * debug the code in some form. - */ -OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") -OUTPUT_ARCH(i386) - -/* -ENTRY(_start) -*/ - -TARGET(binary) -INPUT(coreboot_ram.rom) -SECTIONS -{ - . = CONFIG_ROMBASE; - - .ram . : { - _ram = . ; - coreboot_ram.rom(*) - _eram = . ; - } - - /* This section might be better named .setup */ - .rom . : { - _rom = .; - *(.rom.text); - *(.rom.data); - *(.rodata.*); - *(.rom.data.*); - . = ALIGN(16); - _erom = .; - } - - _lrom = LOADADDR(.rom); - _elrom = LOADADDR(.rom) + SIZEOF(.rom); - _iseg = CONFIG_RAMBASE; - _eiseg = _iseg + SIZEOF(.ram); - _liseg = _ram; - _eliseg = _eram; - - /DISCARD/ : { - *(.comment) - *(.comment.*) - *(.note) - *(.note.*) - } -} diff --git a/src/arch/i386/init/ldscript_fallback.lb b/src/arch/i386/init/ldscript_fallback.lb deleted file mode 100644 index 6d41cbde87..0000000000 --- a/src/arch/i386/init/ldscript_fallback.lb +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Memory map: - * - * CONFIG_RAMBASE - * : data segment - * : bss segment - * : heap - * : stack - * CONFIG_ROMBASE - * : coreboot text - * : readonly text - */ -/* - * Bootstrap code for the STPC Consumer - * Copyright (c) 1999 by Net Insight AB. All Rights Reserved. - * - */ - -/* - * Written by Johan Rydberg, based on work by Daniel Kahlin. - * Rewritten by Eric Biederman - */ -/* - * We use ELF as output format. So that we can - * debug the code in some form. - */ -OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") -OUTPUT_ARCH(i386) - -/* -ENTRY(_start) -*/ - -TARGET(binary) -INPUT(coreboot_ram.rom) -SECTIONS -{ - . = CONFIG_ROMBASE; - - .ram . : { - _ram = . ; - coreboot_ram.rom(*) - _eram = . ; - } - - /* cut _start into last 64k*/ - _x = .; - . = (_x < (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE)) ? (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE) : _x; - - /* This section might be better named .setup */ - .rom . : { - _rom = .; - *(.rom.text); - *(.rom.data); - *(.init.rodata.*); - *(.rodata.*); - *(.rom.data.*); - . = ALIGN(16); - _erom = .; - } - - _lrom = LOADADDR(.rom); - _elrom = LOADADDR(.rom) + SIZEOF(.rom); - _iseg = CONFIG_RAMBASE; - _eiseg = _iseg + SIZEOF(.ram); - _liseg = _ram; - _eliseg = _eram; - - /DISCARD/ : { - *(.comment) - *(.note) - *(.comment.*) - *(.note.*) - } -} -- cgit v1.2.3