From b203c2f95e8174bff1170a47d06186a315de4997 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Thu, 20 Aug 2009 14:48:03 +0000 Subject: 20090819-2-trim-down-cbfs: CBFS uses sprintf, which requires vtxprintf, which requires (in the current design) a nested function. That works on x86, but on PPC this requires a trampoline. In the ROM stage, this is not available, so remove the single use of sprintf and replace it with a direct string handler - it's only used to fill in fixed-length hex values. 20090819-3-more-noreturns-in-romcc: Mark two more functions in romcc as noreturn. Helps clang's scan-build a bit 20090819-4-cbfsify-ppc: Make PPC use CBFS. Support big endian ELF in cbfs-mkstage. Untested and not complete yet. 20090819-5-fix-ppc-build: The CBFS build system requires ROM_IMAGE_SIZE to have a somewhat plausible value. With fixes to tohex* functions as discussed on the list, and correct function names. Signed-off-by: Patrick Georgi Acked-by: Myles Watson Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4558 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/arch/ppc/Config.lb | 6 ++++++ src/arch/ppc/init/ppc_main.c | 20 ++++---------------- 2 files changed, 10 insertions(+), 16 deletions(-) (limited to 'src/arch/ppc') diff --git a/src/arch/ppc/Config.lb b/src/arch/ppc/Config.lb index 1a5ad840e7..aba64c1f98 100644 --- a/src/arch/ppc/Config.lb +++ b/src/arch/ppc/Config.lb @@ -1,3 +1,4 @@ +uses CONFIG_CBFS ldscript init/ldscript.lb makerule coreboot.strip @@ -10,6 +11,11 @@ makerule coreboot.rom action "cp $< $@" end +if CONFIG_CBFS + initobject /src/lib/cbfs.o + initobject /src/lib/lzma.o +end + dir init dir lib dir boot diff --git a/src/arch/ppc/init/ppc_main.c b/src/arch/ppc/init/ppc_main.c index 4dd4487ae8..150deeea67 100644 --- a/src/arch/ppc/init/ppc_main.c +++ b/src/arch/ppc/init/ppc_main.c @@ -5,12 +5,7 @@ #include #include - -extern unsigned _iseg[]; -extern unsigned _liseg[]; -extern unsigned _eliseg[]; - -void (*payload)(void) = (void (*)(void))_iseg; +#include /* * At this point we're running out of flash with our @@ -25,8 +20,7 @@ extern void flush_dcache(void); void ppc_main(void) { - unsigned *from; - unsigned *to; + void (*payload)(void); /* * very early board initialization @@ -49,15 +43,9 @@ void ppc_main(void) flush_dcache(); /* - * Relocate payload (text & data) if necessary + * Relocate payload (text & data) */ - if (_liseg != _iseg) { - from = _liseg; - to = _iseg; - while (from < _eliseg) - *to++ = *from++; - } - + payload = cbfs_load_stage("fallback/coreboot_ram"); payload(); /* NOT REACHED */ -- cgit v1.2.3