From e0e784a456c4d64e5e88ce578371fe6c538db559 Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Wed, 26 Nov 2014 19:25:47 +0000 Subject: Add UCB RISCV support for architecture, soc, and emulation mainboard.. Works in the RISCV version of QEMU. Note that the lzmadecode is so unclean that it needs a lot of work. A cleanup is in progress. We decided in Prague to do this as one thing, because it forms a nice case study of the bare minimum you need to add to get a new architecture going in qemu. Change-Id: If5af15c3a70733d219973e0d032746f8ab027e4d Signed-off-by: Ronald G. Minnich Reviewed-on: http://review.coreboot.org/7584 Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- src/arch/riscv/bootblock.ld | 58 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 src/arch/riscv/bootblock.ld (limited to 'src/arch/riscv/bootblock.ld') diff --git a/src/arch/riscv/bootblock.ld b/src/arch/riscv/bootblock.ld new file mode 100644 index 0000000000..9f5f53b0e1 --- /dev/null +++ b/src/arch/riscv/bootblock.ld @@ -0,0 +1,58 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2006 Advanced Micro Devices, Inc. + * Copyright (C) 2008-2010 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* We use ELF as output format. So that we can debug the code in some form. */ +OUTPUT_FORMAT("elf64-littleriscv", "elf64-littleriscv", "elf64-littleriscv") +OUTPUT_ARCH(riscv) +INCLUDE ldoptions + +PHDRS +{ + to_load PT_LOAD; +} + +ENTRY(_start) +TARGET(binary) +SECTIONS +{ + . = CONFIG_BOOTBLOCK_BASE; + + .bootblock . : { + *(.start); + KEEP(*(.id)); + *(.text); + *(.text.*); + *(.rodata); + *(.rodata.*); + *(.data); + *(.data.*); + *(.bss); + *(.bss.*); + *(.sbss); + *(.sbss.*); + } : to_load = 0xff + + /DISCARD/ : { + *(.comment) + *(.note) + *(.comment.*) + *(.note.*) + } +} -- cgit v1.2.3