From 1c105903078f85dd1be805c737b4e4da6dea0618 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 23 Dec 2018 07:22:59 +0200 Subject: arch/x86: Use a common timestamp.inc with romcc bootblocks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The same file was replicated three times for certain soc/intel bootblocks, yet there are no indications or need to do chipset-specific initialisation. There is no harm in storing the TSC values in MMX registers even when they would not be used. Change-Id: Iec6fa0889f5887effca1d99ef830d383fb733648 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/30393 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/arch/x86/bootblock_romcc.S | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'src/arch/x86/bootblock_romcc.S') diff --git a/src/arch/x86/bootblock_romcc.S b/src/arch/x86/bootblock_romcc.S index 6c1723a4c1..bfcc1e61a9 100644 --- a/src/arch/x86/bootblock_romcc.S +++ b/src/arch/x86/bootblock_romcc.S @@ -19,7 +19,7 @@ * - reset16.inc: the reset vector * - entry16.inc: protected mode setup * - entry32.inc: segment descriptor setup - * - CONFIG_CHIPSET_BOOTBLOCK_INCLUDE: chipset-specific initialization + * - timestamp.inc: store TSC in MMX registers * - generated/bootblock.inc: ROMCC part of the bootblock * * This is used on platforms which do not select C_ENVIRONMENT_BOOTBLOCK, and it @@ -35,9 +35,7 @@ #include #include -#ifdef CONFIG_CHIPSET_BOOTBLOCK_INCLUDE -#include CONFIG_CHIPSET_BOOTBLOCK_INCLUDE -#endif +#include #if IS_ENABLED(CONFIG_SSE) #include -- cgit v1.2.3