From cd49cce7b70e80b4acc49b56bb2bb94370b4d867 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Tue, 5 Mar 2019 16:53:33 -0800 Subject: coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/arch/x86/ioapic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/arch/x86/ioapic.c') diff --git a/src/arch/x86/ioapic.c b/src/arch/x86/ioapic.c index a3969529ca..34ab202f71 100644 --- a/src/arch/x86/ioapic.c +++ b/src/arch/x86/ioapic.c @@ -103,7 +103,7 @@ static void load_vectors(void *ioapic_base) ioapic_interrupts = ioapic_interrupt_count(ioapic_base); - if (IS_ENABLED(CONFIG_IOAPIC_INTERRUPTS_ON_FSB)) { + if (CONFIG(IOAPIC_INTERRUPTS_ON_FSB)) { /* * For the Pentium 4 and above APICs deliver their interrupts * on the front side bus, enable that. @@ -111,7 +111,7 @@ static void load_vectors(void *ioapic_base) printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on FSB\n"); io_apic_write(ioapic_base, 0x03, io_apic_read(ioapic_base, 0x03) | (1 << 0)); - } else if (IS_ENABLED(CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS)) { + } else if (CONFIG(IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS)) { printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on APIC serial bus\n"); io_apic_write(ioapic_base, 0x03, 0); -- cgit v1.2.3