From 26ab9bfeb53a5d73ff4fdb01c8a15417a2f76876 Mon Sep 17 00:00:00 2001 From: Wonkyu Kim Date: Mon, 22 Mar 2021 19:59:18 -0700 Subject: *x86: Support x2apic mode Implement x2apic mode as existing code only supports apic mode. Use info from LAPIC_BASE_MSR (LAPIC_BASE_MSR_X2APIC_MODE) to check if apic mode or x2apic mode and implement x2apic mode according to x2apic specfication. Reference: https://software.intel.com/content/www/us/en/develop/download/intel-64-architecture-x2apic-specification.html BUG=None BRANCH=None TEST=boot to OS and check apic mode cat /proc/cpuinfo | grep "apicid" ex) can see apicid bigger than 255 apicid : 256 apicid : 260 Signed-off-by: Wonkyu Kim Change-Id: I0bb729b0521fb9dc38b7981014755daeaf9ca817 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51723 Reviewed-by: Ravishankar Sarawadi Reviewed-by: Jamie Ryu Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- src/arch/x86/cpu.c | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'src/arch/x86') diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c index 3ef878f517..07bd7b5ff2 100644 --- a/src/arch/x86/cpu.c +++ b/src/arch/x86/cpu.c @@ -213,17 +213,6 @@ static void set_cpu_ops(struct device *cpu) /* Keep track of default APIC ids for SMM. */ static int cpus_default_apic_id[CONFIG_MAX_CPUS]; -/* - * When CPUID executes with EAX set to 1, additional processor identification - * information is returned to EBX register: - * Default APIC ID: EBX[31-24] - this number is the 8 bit ID that is assigned - * to the local APIC on the processor during power on. - */ -static int initial_lapicid(void) -{ - return cpuid_ebx(1) >> 24; -} - /* Function to keep track of cpu default apic_id */ void cpu_add_map_entry(unsigned int index) { -- cgit v1.2.3