From 38f2e9cfe3597db5bc418be2c8c1b87dffa98ca7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Thu, 19 Apr 2012 14:22:43 +0300 Subject: Makefile: rename coreboot_ap linking filenames MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit $(obj)/coreboot_ap -> $(objcbfs)/coreboot_ap.elf It is really a ramstage for AP CPU and not a romstage, it is not enabled for any mainboard by default, and it doesn't compile even if enabled. Change-Id: Ifb9c5cb6df65309660b000876cf6a9a3da9b6839 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/840 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/arch/x86/Makefile.inc | 27 +++++++++------------------ 1 file changed, 9 insertions(+), 18 deletions(-) (limited to 'src/arch') diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index cf10f505b0..d4cd0c321f 100755 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -47,7 +47,7 @@ ifeq ($(CONFIG_PAYLOAD_FILO),y) COREBOOT_ROM_DEPENDENCIES+=filo endif ifeq ($(CONFIG_AP_CODE_IN_CAR),y) -COREBOOT_ROM_DEPENDENCIES+=$(obj)/coreboot_ap +COREBOOT_ROM_DEPENDENCIES+=$(objcbfs)/coreboot_ap.elf endif ifeq ($(CONFIG_GEODE_VSA_FILE),y) COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_VSA_FILENAME) @@ -76,9 +76,9 @@ endif $(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/coreboot_ram.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) @printf " CBFS $(subst $(obj)/,,$(@))\n" cp $(obj)/coreboot.pre $@.tmp - if [ -f $(obj)/coreboot_ap ]; \ + if [ -f $(objcbfs)/coreboot_ap.elf ]; \ then \ - $(CBFSTOOL) $@.tmp add-stage $(obj)/coreboot_ap $(CONFIG_CBFS_PREFIX)/coreboot_ap $(CBFS_COMPRESS_FLAG); \ + $(CBFSTOOL) $@.tmp add-stage $(objcbfs)/coreboot_ap.elf $(CONFIG_CBFS_PREFIX)/coreboot_ap $(CBFS_COMPRESS_FLAG); \ fi $(CBFSTOOL) $@.tmp add-stage $(objcbfs)/coreboot_ram.elf $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG) ifeq ($(CONFIG_PAYLOAD_NONE),y) @@ -170,20 +170,15 @@ $(objgenerated)/ramstage.a: $$(ramstage-objs) $(AR) cr $@ $^ ####################################################################### -# coreboot_ap.rom +# Ramstage for AP CPU (AMD K8, obsolete?) -ifeq ($(CONFIG_AP_CODE_IN_CAR),y) - -$(obj)/coreboot_ap: $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o +$(objcbfs)/coreboot_ap.debug: $(objgenerated)/coreboot_ap.o $(src)/arch/x86/init/ldscript_apc.lb @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -nostdlib -nostartfiles -static -o $@.tmp -L$(obj) -T $(src)/arch/x86/init/ldscript_apc.lb $^ - $(OBJCOPY) --only-keep-debug $@.tmp $@.debug - $(OBJCOPY) --strip-debug $@.tmp - $(OBJCOPY) --add-gnu-debuglink=$@.debug $@.tmp - $(NM) -n $@.tmp | sort > $@.map - mv $@.tmp $@ + $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/init/ldscript_apc.lb $< -endif +$(objgenerated)/coreboot_ap.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H) + @printf " CC $(subst $(obj)/,,$(@))\n" + $(CC) -MMD $(CFLAGS) -I$(src) -D__PRE_RAM__ -I. -I$(obj) -c $< -o $@ ####################################################################### # done @@ -220,10 +215,6 @@ $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/ $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@ else -$(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H) - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD $(CFLAGS) -I$(src) -D__PRE_RAM__ -I. -I$(obj) -c $< -o $@ - $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h @printf " CC romstage.inc\n" $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ -- cgit v1.2.3