From 85b851add801eee5de517d32a92048bb223d4054 Mon Sep 17 00:00:00 2001 From: Carl-Daniel Hailfinger Date: Wed, 22 Apr 2009 22:08:00 +0000 Subject: Convert 12 more boards to use include statements in Config.lb. Signed-off-by: Carl-Daniel Hailfinger Acked-by: Peter Stuge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4186 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/config/nofailovercalculation128.lb | 38 ++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 src/config/nofailovercalculation128.lb (limited to 'src/config') diff --git a/src/config/nofailovercalculation128.lb b/src/config/nofailovercalculation128.lb new file mode 100644 index 0000000000..a817a68679 --- /dev/null +++ b/src/config/nofailovercalculation128.lb @@ -0,0 +1,38 @@ +## +## Compute the location and size of where this firmware image +## (coreboot plus bootloader) will live in the boot rom chip. +## +if USE_FALLBACK_IMAGE + default ROM_SECTION_SIZE = FALLBACK_SIZE + default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) +else + default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) + default ROM_SECTION_OFFSET = 0 +end + +## +## Compute the start location and size size of +## The coreboot bootloader. +## +default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) +default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) + +## +## Compute where this copy of coreboot will start in the boot rom +## +default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE ) + +## +## Compute a range of ROM that can cached to speed up coreboot, +## execution speed. +## +## XIP_ROM_SIZE must be a power of 2. +## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE +## +default XIP_ROM_SIZE = 128 * 1024 +default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE ) + +## This is needed to work around a parser bug. +if USE_FALLBACK_IMAGE +end + -- cgit v1.2.3