From b995f436b355ec357788d3a8c11c70bf5ec437df Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 20 Nov 2016 17:31:58 +0200 Subject: AGESA: Disable PCI_CFG_EXT_IO MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We don't need to do explicit pci_io_read/write operations, as we can use MMCONF everywhere. AGESA code still enables extended cf8/cfc should it be required by payload or OS. Change-Id: I278e5e26eb9a247f67927cbc67e04f081ca50f7b Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/17535 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/cpu/amd/agesa/family15/Kconfig | 1 - src/cpu/amd/agesa/family15/fixme.c | 7 ------- 2 files changed, 8 deletions(-) (limited to 'src/cpu/amd/agesa/family15') diff --git a/src/cpu/amd/agesa/family15/Kconfig b/src/cpu/amd/agesa/family15/Kconfig index eb32b70b8a..22e4d8c0f5 100644 --- a/src/cpu/amd/agesa/family15/Kconfig +++ b/src/cpu/amd/agesa/family15/Kconfig @@ -15,7 +15,6 @@ config CPU_AMD_AGESA_FAMILY15 bool - select PCI_IO_CFG_EXT select MMCONF_SUPPORT_DEFAULT select X86_AMD_FIXED_MTRRS diff --git a/src/cpu/amd/agesa/family15/fixme.c b/src/cpu/amd/agesa/family15/fixme.c index 5633007e91..7b8598d816 100644 --- a/src/cpu/amd/agesa/family15/fixme.c +++ b/src/cpu/amd/agesa/family15/fixme.c @@ -269,13 +269,6 @@ void amd_initmmio(void) MsrReg = CONFIG_MMCONF_BASE_ADDRESS | (LibAmdBitScanReverse(CONFIG_MMCONF_BUS_NUMBER) << 2) | 1; LibAmdMsrWrite(0xC0010058, &MsrReg, &StdHeader); - /* - * Set the NB_CFG MSR register. Enable CF8 extended configuration cycles. - */ - LibAmdMsrRead(0xC001001F, &MsrReg, &StdHeader); - MsrReg = MsrReg | (1ULL << 46); - LibAmdMsrWrite(0xC001001F, &MsrReg, &StdHeader); - #if IS_ENABLED(CONFIG_BOARD_AMD_DINAR) UINT32 PciData; PCI_ADDR PciAddress; -- cgit v1.2.3