From 2ca2f177245fdfa34ae7bd732052c8984e2b8b7d Mon Sep 17 00:00:00 2001 From: Zheng Bao Date: Mon, 28 Mar 2011 04:29:14 +0000 Subject: Add AMD C32 support. It is based on other existing Fam10 code. Signed-off-by: Zheng Bao Acked-by: Marc Jones git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6464 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/amd/socket_C32/Kconfig | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 src/cpu/amd/socket_C32/Kconfig (limited to 'src/cpu/amd/socket_C32/Kconfig') diff --git a/src/cpu/amd/socket_C32/Kconfig b/src/cpu/amd/socket_C32/Kconfig new file mode 100644 index 0000000000..7ffa374962 --- /dev/null +++ b/src/cpu/amd/socket_C32/Kconfig @@ -0,0 +1,42 @@ +config CPU_AMD_SOCKET_C32 + bool + select CPU_AMD_MODEL_10XXX + select HT3_SUPPORT + select PCI_IO_CFG_EXT + select CACHE_AS_RAM + +config CPU_SOCKET_TYPE + hex + default 0x14 + depends on CPU_AMD_SOCKET_C32 + +config EXT_RT_TBL_SUPPORT + bool + default n + depends on CPU_AMD_SOCKET_C32 + +config EXT_CONF_SUPPORT + bool + default n + depends on CPU_AMD_SOCKET_C32 + +config CBB + hex + default 0x0 + depends on CPU_AMD_SOCKET_C32 + +config CDB + hex + default 0x18 + depends on CPU_AMD_SOCKET_C32 + +config XIP_ROM_BASE + hex + default 0xfff80000 + depends on CPU_AMD_SOCKET_C32 + +config XIP_ROM_SIZE + hex + default 0x80000 + depends on CPU_AMD_SOCKET_C32 + -- cgit v1.2.3