From 0d5ced0e23d7c35207ce0b1f0b213bc29cef6534 Mon Sep 17 00:00:00 2001
From: Myles Watson <mylesgw@gmail.com>
Date: Fri, 28 Aug 2009 14:40:04 +0000
Subject: Move DCACHE support into the cpu family for AMD model_fxx.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4610 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/cpu/amd/model_fxx/Kconfig  | 31 ++++++++++++++++++++++++++++---
 src/cpu/amd/socket_940/Kconfig |  5 +++++
 2 files changed, 33 insertions(+), 3 deletions(-)

(limited to 'src/cpu/amd')

diff --git a/src/cpu/amd/model_fxx/Kconfig b/src/cpu/amd/model_fxx/Kconfig
index 1037725a97..685d021c9c 100644
--- a/src/cpu/amd/model_fxx/Kconfig
+++ b/src/cpu/amd/model_fxx/Kconfig
@@ -1,15 +1,40 @@
 config HAVE_INIT_TIMER
 	bool
 	default y
-	depends on CPU_AMD_SOCKET_F
+	depends on CPU_AMD_MODEL_FXX
 
 config HAVE_MOVNTI
 	bool
 	default y
-	depends on CPU_AMD_SOCKET_F
+	depends on CPU_AMD_MODEL_FXX
 
 config CPU_ADDR_BITS
 	int
 	default 40
-	depends on CPU_AMD_SOCKET_F
+	depends on CPU_AMD_MODEL_FXX
+
+config USE_PRINTK_IN_CAR
+	bool
+	default y
+	depends on CPU_AMD_MODEL_FXX
+
+config USE_DCACHE_RAM
+	bool
+	default y
+	depends on CPU_AMD_MODEL_FXX
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xc8000
+	depends on CPU_AMD_MODEL_FXX
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x08000
+	depends on CPU_AMD_MODEL_FXX
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+	hex
+	default 0x01000
+	depends on CPU_AMD_MODEL_FXX
 
diff --git a/src/cpu/amd/socket_940/Kconfig b/src/cpu/amd/socket_940/Kconfig
index d00f388287..9a889be2cc 100644
--- a/src/cpu/amd/socket_940/Kconfig
+++ b/src/cpu/amd/socket_940/Kconfig
@@ -12,3 +12,8 @@ config K8_HT_FREQ_1G_SUPPORT
 	hex
 	default 1
 	depends on CPU_AMD_SOCKET_940
+
+config CPU_AMD_MODEL_FXX
+	bool
+	default y
+	depends on CPU_AMD_SOCKET_940
-- 
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