From ed15220b87d298088a074747b24e212c23333e33 Mon Sep 17 00:00:00 2001 From: Myles Watson Date: Thu, 11 Mar 2010 21:34:27 +0000 Subject: Replace clear_memory with memset. Replace set_init_ram_access with the call to set_var_mtrr. Remove unused #include statments. Signed-off-by: Myles Watson Acked-by: Patrick Georgi git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5201 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/amd/car/clear_init_ram.c | 23 ----------------------- src/cpu/amd/car/post_cache_as_ram.c | 12 ++++++++---- src/cpu/amd/model_10xxx/init_cpus.c | 2 +- src/cpu/amd/model_10xxx/model_10xxx_init.c | 1 - src/cpu/amd/model_fxx/init_cpus.c | 2 +- src/cpu/amd/model_fxx/model_fxx_init.c | 3 +-- 6 files changed, 11 insertions(+), 32 deletions(-) delete mode 100644 src/cpu/amd/car/clear_init_ram.c (limited to 'src/cpu/amd') diff --git a/src/cpu/amd/car/clear_init_ram.c b/src/cpu/amd/car/clear_init_ram.c deleted file mode 100644 index 624e0fea83..0000000000 --- a/src/cpu/amd/car/clear_init_ram.c +++ /dev/null @@ -1,23 +0,0 @@ -/* by yhlu 6.2005 */ -/* be warned, this file will be used core 0/node 0 only */ - -static void __attribute__((noinline)) clear_init_ram(void) -{ - // gcc 3.4.5 will inline the copy_and_run and clear_init_ram in post_cache_as_ram - // will reuse %edi as 0 from clear_memory for copy_and_run part, actually it is increased already - // so noline clear_init_ram - -#if CONFIG_HAVE_ACPI_RESUME == 1 - /* clear only coreboot used region of memory. Note: this may break ECC enabled boards */ - clear_memory( CONFIG_RAMBASE, (CONFIG_RAMTOP) - CONFIG_RAMBASE - CONFIG_DCACHE_RAM_SIZE); -#else - clear_memory(0, ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_SIZE)); -#endif -} - -/* be warned, this file will be used by core other than core 0/node 0 or core0/node0 when cpu_reset*/ -static void set_init_ram_access(void) -{ - set_var_mtrr(0, 0x00000000, CONFIG_RAMTOP, MTRR_TYPE_WRBACK); -} - diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c index 5c085cd6d8..10194b9659 100644 --- a/src/cpu/amd/car/post_cache_as_ram.c +++ b/src/cpu/amd/car/post_cache_as_ram.c @@ -3,8 +3,6 @@ */ #include "cpu/amd/car/disable_cache_as_ram.c" -#include "cpu/amd/car/clear_init_ram.c" - static inline void print_debug_pcar(const char *strval, uint32_t val) { printk_debug("%s%08x\r\n", strval, val); @@ -64,7 +62,8 @@ static void post_cache_as_ram(void) #error "You need to set CONFIG_RAMTOP greater than 1M" #endif - set_init_ram_access(); /* So we can access RAM from [1M, CONFIG_RAMTOP) */ + /* So we can access RAM from [1M, CONFIG_RAMTOP) */ + set_var_mtrr(0, 0x00000000, CONFIG_RAMTOP, MTRR_TYPE_WRBACK); // dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x8000, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x7c00); print_debug("Copying data from cache to RAM -- switching to use RAM as stack... "); @@ -94,7 +93,12 @@ static void post_cache_as_ram(void) disable_cache_as_ram_bsp(); print_debug("Clearing initial memory region: "); - clear_init_ram(); //except the range from [(CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_SIZE, (CONFIG_RAMTOP)) +#if CONFIG_HAVE_ACPI_RESUME == 1 + /* clear only coreboot used region of memory. Note: this may break ECC enabled boards */ + memset((void*) CONFIG_RAMBASE, (CONFIG_RAMTOP) - CONFIG_RAMBASE - CONFIG_DCACHE_RAM_SIZE, 0); +#else + memset((void*)0, ((CONFIG_RAMTOP) - CONFIG_DCACHE_RAM_SIZE), 0); +#endif print_debug("Done\r\n"); // dump_mem((CONFIG_RAMTOP) - 0x8000, (CONFIG_RAMTOP) - 0x7c00); diff --git a/src/cpu/amd/model_10xxx/init_cpus.c b/src/cpu/amd/model_10xxx/init_cpus.c index 822e362a74..c43887f380 100644 --- a/src/cpu/amd/model_10xxx/init_cpus.c +++ b/src/cpu/amd/model_10xxx/init_cpus.c @@ -421,7 +421,7 @@ static u32 init_cpus(u32 cpu_init_detectedx) */ //wait_till_sysinfo_in_ram(); - set_init_ram_access(); + set_var_mtrr(0, 0x00000000, CONFIG_RAMTOP, MTRR_TYPE_WRBACK); STOP_CAR_AND_CPU(); printk_debug("\nAP %02x should be halted but you are reading this....\n", apicid); diff --git a/src/cpu/amd/model_10xxx/model_10xxx_init.c b/src/cpu/amd/model_10xxx/model_10xxx_init.c index daf3eceaa4..6ef1f42471 100644 --- a/src/cpu/amd/model_10xxx/model_10xxx_init.c +++ b/src/cpu/amd/model_10xxx/model_10xxx_init.c @@ -34,7 +34,6 @@ #include #include #include -#include #include #include diff --git a/src/cpu/amd/model_fxx/init_cpus.c b/src/cpu/amd/model_fxx/init_cpus.c index 483399c0c0..510c803ca9 100644 --- a/src/cpu/amd/model_fxx/init_cpus.c +++ b/src/cpu/amd/model_fxx/init_cpus.c @@ -317,7 +317,7 @@ static unsigned init_cpus(unsigned cpu_init_detectedx) print_initcpu8("while waiting for BSP signal to STOP, timeout in ap ", apicid); } lapic_write(LAPIC_MSG_REG, (apicid<<24) | 0x44); // bsp can not check it before stop_this_cpu - set_init_ram_access(); + set_var_mtrr(0, 0x00000000, CONFIG_RAMTOP, MTRR_TYPE_WRBACK); #if CONFIG_MEM_TRAIN_SEQ == 1 train_ram_on_node(id.nodeid, id.coreid, sysinfo, (unsigned) STOP_CAR_AND_CPU); diff --git a/src/cpu/amd/model_fxx/model_fxx_init.c b/src/cpu/amd/model_fxx/model_fxx_init.c index 2d72618448..b4a981bcb3 100644 --- a/src/cpu/amd/model_fxx/model_fxx_init.c +++ b/src/cpu/amd/model_fxx/model_fxx_init.c @@ -24,7 +24,6 @@ #include #include #include -#include #include @@ -238,7 +237,7 @@ static inline void clear_2M_ram(unsigned long basek, struct mtrr_state *mtrr_sta /* clear memory 2M (limitk - basek) */ addr = (void *)(((uint32_t)addr) | ((basek & 0x7ff) << 10)); - clear_memory(addr, size); + memset(addr, size, 0); } static void init_ecc_memory(unsigned node_id) -- cgit v1.2.3