From 05e740fc40e409dcf8d592f4bbeaf87dc92140c5 Mon Sep 17 00:00:00 2001
From: Patrick Georgi <patrick@georgi-clan.de>
Date: Sat, 31 Mar 2012 12:52:21 +0200
Subject: Replace cache control magic numbers with symbols

Instead of opaque numbers like (1<<29), use
symbols like CR0_NoWriteThrough.

Change-Id: Id845e087fb472cfaf5f71beaf37fbf0d407880b5
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/833
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
---
 src/cpu/intel/car/cache_as_ram.inc    |  7 ++++---
 src/cpu/intel/car/cache_as_ram_ht.inc | 17 +++++++++--------
 2 files changed, 13 insertions(+), 11 deletions(-)

(limited to 'src/cpu/intel/car')

diff --git a/src/cpu/intel/car/cache_as_ram.inc b/src/cpu/intel/car/cache_as_ram.inc
index 7742a68225..6e642f68f9 100644
--- a/src/cpu/intel/car/cache_as_ram.inc
+++ b/src/cpu/intel/car/cache_as_ram.inc
@@ -23,6 +23,7 @@
 
 #include <cpu/x86/stack.h>
 #include <cpu/x86/mtrr.h>
+#include <cpu/x86/cache.h>
 #include <cpu/x86/lapic_def.h>
 #include <cpu/x86/post_code.h>
 
@@ -254,7 +255,7 @@ clear_fixed_var_mtrr_out:
 
 	/* Enable cache. */
 	movl	%cr0, %eax
-	andl	$(~((1 << 30) | (1 << 29))), %eax
+	andl	$(~(CR0_CacheDisable | CR0_NoWriteThrough)), %eax
 	movl	%eax, %cr0
 
 	/* Read the range with lodsl. */
@@ -328,7 +329,7 @@ lout:
 
 	/* Disable cache. */
 	movl	%cr0, %eax
-	orl	$(1 << 30), %eax
+	orl	$CR0_CacheDisable, %eax
 	movl	%eax, %cr0
 
 	/* Clear sth. */
@@ -353,7 +354,7 @@ lout:
 
 	/* Enable cache. */
 	movl	%cr0, %eax
-	andl	$(~((1 << 30) | (1 << 29))), %eax
+	andl	$(~(CR0_CacheDisable | CR0_NoWriteThrough)), %eax
 	movl	%eax, %cr0
 
 	/* Clear boot_complete flag. */
diff --git a/src/cpu/intel/car/cache_as_ram_ht.inc b/src/cpu/intel/car/cache_as_ram_ht.inc
index ca107c4c56..4e0f391d33 100644
--- a/src/cpu/intel/car/cache_as_ram_ht.inc
+++ b/src/cpu/intel/car/cache_as_ram_ht.inc
@@ -22,6 +22,7 @@
 
 #include <cpu/x86/stack.h>
 #include <cpu/x86/mtrr.h>
+#include <cpu/x86/cache.h>
 #include <cpu/x86/post_code.h>
 #include <cpu/x86/lapic_def.h>
 
@@ -188,7 +189,7 @@ ap_init:
 
 	/* Do not disable cache (so BSP can enable it). */
         movl	%cr0, %eax
-	andl	$(~((1 << 30) | (1 << 29))), %eax
+	andl	$(~(CR0_CacheDisable | CR0_NoWriteThrough)), %eax
 	movl	%eax, %cr0
 
 	post_code(0x28)
@@ -271,7 +272,7 @@ no_msr_11e:
 
 	/* Enable cache (CR0.CD = 0, CR0.NW = 0). */
 	movl	%cr0, %eax
-	andl	$(~((1 << 30) | (1 << 29))), %eax
+	andl	$(~(CR0_CacheDisable | CR0_NoWriteThrough)), %eax
 	invd
 	movl	%eax, %cr0
 
@@ -284,7 +285,7 @@ no_msr_11e:
 
 	/* Enable Cache-as-RAM mode by disabling cache. */
 	movl	%cr0, %eax
-	orl	$(1 << 30), %eax
+	orl	$CR0_CacheDisable, %eax
 	movl	%eax, %cr0
 
 	post_code(0x2d)
@@ -310,7 +311,7 @@ no_msr_11e:
 
 	/* Enable cache. */
 	movl	%cr0, %eax
-	andl	$(~((1 << 30) | (1 << 29))), %eax
+	andl	$(~(CR0_CacheDisable | CR0_NoWriteThrough)), %eax
 	movl	%eax, %cr0
 
 	post_code(0x2e)
@@ -338,7 +339,7 @@ no_msr_11e:
 
 	/* Disable cache. */
 	movl	%cr0, %eax
-	orl	$(1 << 30), %eax
+	orl	$CR0_CacheDisable, %eax
 	movl	%eax, %cr0
 
 	post_code(0x34)
@@ -357,14 +358,14 @@ no_msr_11e:
 
 	/* Enable cache. */
 	movl	%cr0, %eax
-	andl	$~((1 << 30) | (1 << 29)), %eax
+	andl	$~(CR0_CacheDisable | CR0_NoWriteThrough), %eax
 	movl	%eax, %cr0
 
 	post_code(0x37)
 
 	/* Disable cache. */
 	movl	%cr0, %eax
-	orl	$(1 << 30), %eax
+	orl	$CR0_CacheDisable, %eax
 	movl	%eax, %cr0
 
 	post_code(0x38)
@@ -393,7 +394,7 @@ no_msr_11e:
 
 	/* And enable cache again after setting MTRRs. */
 	movl	%cr0, %eax
-	andl	$~((1 << 30) | (1 << 29)), %eax
+	andl	$~(CR0_CacheDisable | CR0_NoWriteThrough), %eax
 	movl	%eax, %cr0
 
 	post_code(0x3a)
-- 
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