From 9557a34abeb8c2101a853f49e20a3671c4551aef Mon Sep 17 00:00:00 2001 From: Matt Delco Date: Mon, 13 Aug 2018 13:49:02 -0700 Subject: cpu/intel/common: add function to init cppc_config This change adds a method to init a cppc_config structure in a way that should ideally work across Intel processors that support EIST. Change-Id: Ib767df63d796bd1f21e36bcf575cf912e09090a1 Signed-off-by: Matt Delco Reviewed-on: https://review.coreboot.org/28068 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie --- src/cpu/intel/common/common.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src/cpu/intel/common/common.h') diff --git a/src/cpu/intel/common/common.h b/src/cpu/intel/common/common.h index 0d0b954886..81c9f16d19 100644 --- a/src/cpu/intel/common/common.h +++ b/src/cpu/intel/common/common.h @@ -17,4 +17,12 @@ void set_vmx(void); +/* + * Init CPPC block with MSRs for Intel Enhanced Speed Step Technology. + * Version 2 is suggested--this function's implementation of version 3 + * may have room for improvment. + */ +struct cppc_config; +void cpu_init_cppc_config(struct cppc_config *config, u32 version); + #endif -- cgit v1.2.3