From 5a157176dd8787aed39a8d14691ba536bee08dcf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 1 Jul 2019 10:12:45 +0300 Subject: cpu/x86/lapic: Refactor timer_fsb() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Common apic_timer code in cpu/x86 should not depend on intel header files. Change-Id: Ib099921d4b8e561daea47219385762bb00fc4548 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34091 Reviewed-by: Arthur Heymans Reviewed-by: Marshall Dawson Tested-by: build bot (Jenkins) --- src/cpu/intel/common/fsb.c | 29 ++++++++++++++++++++++++----- 1 file changed, 24 insertions(+), 5 deletions(-) (limited to 'src/cpu/intel/common') diff --git a/src/cpu/intel/common/fsb.c b/src/cpu/intel/common/fsb.c index d66e87a396..2d86abd929 100644 --- a/src/cpu/intel/common/fsb.c +++ b/src/cpu/intel/common/fsb.c @@ -11,12 +11,16 @@ * GNU General Public License for more details. */ +#include #include #include #include #include #include #include +#include + +static u32 g_timer_fsb CAR_GLOBAL; static int get_fsb(void) { @@ -67,16 +71,31 @@ static int get_fsb(void) return ret; } -int get_ia32_fsb(void) +static int set_timer_fsb(void) { - int ret; + int ret = get_fsb(); - ret = get_fsb(); + if (ret > 0) { + car_set_var(g_timer_fsb, ret); + return 0; + } if (ret == -1) printk(BIOS_ERR, "FSB not found\n"); if (ret == -2) printk(BIOS_ERR, "CPU not supported\n"); - return ret; + return -1; +} + +u32 get_timer_fsb(void) +{ + u32 fsb; + + fsb = car_get_var(g_timer_fsb); + if (fsb > 0) + return fsb; + + set_timer_fsb(); + return car_get_var(g_timer_fsb); } /** @@ -87,7 +106,7 @@ int get_ia32_fsb(void) */ int get_ia32_fsb_x3(void) { - const int fsb = get_ia32_fsb(); + const int fsb = get_timer_fsb(); if (fsb > 0) return 100 * DIV_ROUND_CLOSEST(3 * fsb, 100); -- cgit v1.2.3