From 8a2f167e7b99c171161937f52ccf5bc4ac9d6685 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Wed, 20 Jul 2016 13:29:59 +0300 Subject: intel car: Unify postcodes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Not all are matched, but this makes it easier to backport MTRR changes from haswell. Change-Id: Ida5943b1469fc0089a31ff3b18131fb82b0941c6 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/15760 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Aaron Durbin --- src/cpu/intel/haswell/cache_as_ram.inc | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'src/cpu/intel/haswell') diff --git a/src/cpu/intel/haswell/cache_as_ram.inc b/src/cpu/intel/haswell/cache_as_ram.inc index 3349883c53..fe595fbd22 100644 --- a/src/cpu/intel/haswell/cache_as_ram.inc +++ b/src/cpu/intel/haswell/cache_as_ram.inc @@ -179,8 +179,6 @@ before_romstage: * for setting up MTRRs. */ movl %eax, %ebx - post_code(0x2f) - post_code(0x30) /* Disable cache. */ @@ -196,7 +194,7 @@ before_romstage: andl $(~MTRR_DEF_TYPE_EN), %eax wrmsr - post_code(0x31) + post_code(0x32) /* Disable the no eviction run state */ movl $NoEvictMod_MSR, %ecx -- cgit v1.2.3