From 4dcc5737cd431b729a1011c24012d6ee1a481b90 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Thu, 28 Jun 2012 12:16:12 +0300 Subject: Intel cpus: delete dead CAR code and whitespace fixes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit A diff from model_6fx to model_106cx suggests there is little CORE2 specific code that was once considered useful to have. In its current status however, sockets supporting model_6fx use model_6ex CAR init, so that specific code is actually never used. Deletes file: model_6fx/cache_as_ram.inc Change-Id: I6c0204446fa98207e31f91895e1cf30fde42382c Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/640 Tested-by: build bot (Jenkins) Reviewed-by: Sven Schnelle --- src/cpu/intel/model_106cx/cache_as_ram.inc | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) (limited to 'src/cpu/intel/model_106cx/cache_as_ram.inc') diff --git a/src/cpu/intel/model_106cx/cache_as_ram.inc b/src/cpu/intel/model_106cx/cache_as_ram.inc index 74d0a99dbe..c626cd845b 100644 --- a/src/cpu/intel/model_106cx/cache_as_ram.inc +++ b/src/cpu/intel/model_106cx/cache_as_ram.inc @@ -83,7 +83,7 @@ clear_mtrrs: wrmsr /* Enable cache (CR0.CD = 0, CR0.NW = 0). */ - movl %cr0, %eax + movl %cr0, %eax andl $(~(CR0_CacheDisable | CR0_NoWriteThrough)), %eax invd movl %eax, %cr0 @@ -164,18 +164,6 @@ clear_mtrrs: post_code(0x31) invd -#if 0 - xorl %eax, %eax - xorl %edx, %edx - movl $MTRRphysBase_MSR(0), %ecx - wrmsr - movl $MTRRphysMask_MSR(0), %ecx - wrmsr - movl $MTRRphysBase_MSR(1), %ecx - wrmsr - movl $MTRRphysMask_MSR(1), %ecx - wrmsr -#endif post_code(0x33) -- cgit v1.2.3