From df7aecd92643d207feaf7fd840f8835097346644 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sat, 21 Jul 2018 15:03:06 +0200 Subject: cpu/intel: Configure IA32_FEATURE_CONTROL for alternative SMRR Some CPUs, (Intel core2 and pineview) have slightly different SMRR MTRR mechanism. The MSR_SMRR_PHYSBASE/MASK MSRs are at a different location, have slightly different semantics and need SMRR enable in a locked down IA32_FEATURE_CONTROL MSR. This change takes away the possibility to (not) lock IA32_FEATURE_CONTROL on these CPUs, as this is needed for SMRR MSR to work. Since sockets cover multiple CPUs of which only some support SMRR, the Kconfig option CONFIG_SET_IA32_FC_LOCK_BIT is kept in place, even though it gets meaningless on those CPUs. Locking that bit was the default anyway. With this patch Intel Netburst CPUs also configure IA32_FEATURE_CONTROL. According to Intel 64 and IA-32 Architectures Software Developer's Manual those CPUs support that MSR so issues are not to be expected. Change-Id: Ia85602e75385e24ebded75e6e6dd38ccc969a76b Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/27586 Tested-by: Patrick Georgi Reviewed-by: Martin Roth --- src/cpu/intel/model_106cx/model_106cx_init.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/cpu/intel/model_106cx') diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c index 75e110683e..e44302606e 100644 --- a/src/cpu/intel/model_106cx/model_106cx_init.c +++ b/src/cpu/intel/model_106cx/model_106cx_init.c @@ -88,9 +88,6 @@ static void model_106cx_init(struct device *cpu) /* Enable the local CPU APICs */ setup_lapic(); - /* Set virtualization based on Kconfig option */ - set_vmx_and_lock(); - /* Configure C States */ configure_c_states(); -- cgit v1.2.3