From dfbe6bd5c38d5feb6aa2778b2351cb13e0b1ecc8 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Mon, 29 Oct 2018 06:56:52 +0100 Subject: src: Add missing include Change-Id: I6a9d71e69ed9230b92f0f330875515a5df29fc06 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/29312 Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/cpu/intel/model_206ax/model_206ax.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/cpu/intel/model_206ax') diff --git a/src/cpu/intel/model_206ax/model_206ax.h b/src/cpu/intel/model_206ax/model_206ax.h index f4d469c9cf..2bf9d32e46 100644 --- a/src/cpu/intel/model_206ax/model_206ax.h +++ b/src/cpu/intel/model_206ax/model_206ax.h @@ -17,6 +17,8 @@ #ifndef _CPU_INTEL_MODEL_206AX_H #define _CPU_INTEL_MODEL_206AX_H +#include + /* SandyBridge/IvyBridge bus clock is fixed at 100MHz */ #define SANDYBRIDGE_BCLK 100 -- cgit v1.2.3