From a988091d395ac59639329161a0d500995886e192 Mon Sep 17 00:00:00 2001 From: Keith Hui Date: Mon, 9 Dec 2019 20:25:16 -0500 Subject: cpu/intel/model_6?x{slot_1}: Leave enabling CONFIG_SMP to the mainboard MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit These predate hyperthreading so they are not SMP capable unless installed in a SMP board. Turning SMP off shaves 128 compressed bytes from ramstage. Change-Id: I114bdc83ed40ccd9d3996aabf77422236d9d12fa Signed-off-by: Keith Hui Reviewed-on: https://review.coreboot.org/c/coreboot/+/37627 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki Reviewed-by: Angel Pons --- src/cpu/intel/model_6bx/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'src/cpu/intel/model_6bx/Kconfig') diff --git a/src/cpu/intel/model_6bx/Kconfig b/src/cpu/intel/model_6bx/Kconfig index 64f193a77e..eb4b6751cd 100644 --- a/src/cpu/intel/model_6bx/Kconfig +++ b/src/cpu/intel/model_6bx/Kconfig @@ -4,5 +4,4 @@ config CPU_INTEL_MODEL_6BX select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 - select SMP select SUPPORT_CPU_UCODE_IN_CBFS -- cgit v1.2.3