From 242ea84b017b7f2812a4a1ba4b4996e5f1bb35ab Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Thu, 23 Nov 2017 21:23:44 +0100 Subject: intel: Replace msr(0x198) with msr(IA32_PERF_STATUS) Change-Id: I22241427d1405de2e2eb2b3cfb029f3ce2c8dace Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/22585 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/cpu/intel/model_6ex/model_6ex_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/cpu/intel/model_6ex') diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c index 6e5b339444..96830c495d 100644 --- a/src/cpu/intel/model_6ex/model_6ex_init.c +++ b/src/cpu/intel/model_6ex/model_6ex_init.c @@ -86,7 +86,7 @@ static void configure_misc(void) wrmsr(IA32_MISC_ENABLE, msr); // set maximum CPU speed - msr = rdmsr(IA32_PERF_STS); + msr = rdmsr(IA32_PERF_STATUS); int busratio_max = (msr.hi >> (40-32)) & 0x1f; msr = rdmsr(IA32_PLATFORM_ID); -- cgit v1.2.3