From 0cf0805e924b834c30fe290412e94e42f8f49cfb Mon Sep 17 00:00:00 2001 From: Damien Zammit Date: Sun, 3 May 2015 19:49:37 +1000 Subject: cpu/intel/socket_FCBGA559: Add new socket for Atom D5xx MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Tested on Intel D510MO board, boots to UART console. Change-Id: I82a630c9836c099d0fcc62e019c20f328a75151d Signed-off-by: Damien Zammit Reviewed-on: http://review.coreboot.org/10066 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc Reviewed-by: Kyösti Mälkki --- src/cpu/intel/socket_FCBGA559/Kconfig | 20 ++++++++++++++++++++ src/cpu/intel/socket_FCBGA559/Makefile.inc | 8 ++++++++ 2 files changed, 28 insertions(+) create mode 100644 src/cpu/intel/socket_FCBGA559/Kconfig create mode 100644 src/cpu/intel/socket_FCBGA559/Makefile.inc (limited to 'src/cpu/intel/socket_FCBGA559') diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig new file mode 100644 index 0000000000..9eaa71b58a --- /dev/null +++ b/src/cpu/intel/socket_FCBGA559/Kconfig @@ -0,0 +1,20 @@ +config CPU_INTEL_SOCKET_FCBGA559 + bool + +if CPU_INTEL_SOCKET_FCBGA559 + +config SOCKET_SPECIFIC_OPTIONS + def_bool y + select CPU_INTEL_MODEL_106CX + select MMX + select SSE + +config DCACHE_RAM_BASE + hex + default 0xffafc000 + +config DCACHE_RAM_SIZE + hex + default 0x4000 + +endif diff --git a/src/cpu/intel/socket_FCBGA559/Makefile.inc b/src/cpu/intel/socket_FCBGA559/Makefile.inc new file mode 100644 index 0000000000..e36c8b1b0c --- /dev/null +++ b/src/cpu/intel/socket_FCBGA559/Makefile.inc @@ -0,0 +1,8 @@ +subdirs-y += ../model_106cx +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/smm +subdirs-y += ../microcode +subdirs-y += ../hyperthreading -- cgit v1.2.3