From 439356fabcacbbc3a3231f6e27b5298f8f5ad41f Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Wed, 2 Sep 2015 22:23:11 -0500 Subject: x86: remove cpu_incs as romstage Make variable When building up which files to include in romstage there were both 'cpu_incs' and 'cpu_incs-y' which were used to generate crt0.S. Remove the former to settle on cpu_incs-y as the way to be included. BUG=chrome-os-partner:44827 BRANCH=None TEST=Built rambi. No include file changes. Change-Id: I8dc0631f8253c21c670f2f02928225ed5b869ce6 Signed-off-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/11494 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/cpu/intel/haswell/Makefile.inc | 2 +- src/cpu/intel/model_106cx/Makefile.inc | 2 +- src/cpu/intel/model_2065x/Makefile.inc | 2 +- src/cpu/intel/model_206ax/Makefile.inc | 2 +- src/cpu/intel/slot_1/Makefile.inc | 2 +- src/cpu/intel/socket_BGA956/Makefile.inc | 2 +- src/cpu/intel/socket_FC_PGA370/Makefile.inc | 2 +- src/cpu/intel/socket_LGA771/Makefile.inc | 2 +- src/cpu/intel/socket_PGA370/Makefile.inc | 2 +- src/cpu/intel/socket_mFCBGA479/Makefile.inc | 2 +- src/cpu/intel/socket_mFCPGA478/Makefile.inc | 2 +- src/cpu/intel/socket_mPGA479M/Makefile.inc | 2 +- 12 files changed, 12 insertions(+), 12 deletions(-) (limited to 'src/cpu/intel') diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index 4297122e69..a4a9c34475 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -16,7 +16,7 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c smm-y += monotonic_timer.c -cpu_incs += $(src)/cpu/intel/haswell/cache_as_ram.inc +cpu_incs-y += $(src)/cpu/intel/haswell/cache_as_ram.inc subdirs-y += ../../x86/tsc subdirs-y += ../../x86/mtrr diff --git a/src/cpu/intel/model_106cx/Makefile.inc b/src/cpu/intel/model_106cx/Makefile.inc index dbc093d018..8aa5a5eebe 100644 --- a/src/cpu/intel/model_106cx/Makefile.inc +++ b/src/cpu/intel/model_106cx/Makefile.inc @@ -1,5 +1,5 @@ ramstage-y += model_106cx_init.c subdirs-y += ../../x86/name -cpu_incs += $(src)/cpu/intel/car/cache_as_ram_ht.inc +cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram_ht.inc cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc index 3da26dd33b..1b5d2ba2d5 100644 --- a/src/cpu/intel/model_2065x/Makefile.inc +++ b/src/cpu/intel/model_2065x/Makefile.inc @@ -19,4 +19,4 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c -cpu_incs += $(src)/cpu/intel/model_2065x/cache_as_ram.inc +cpu_incs-y += $(src)/cpu/intel/model_2065x/cache_as_ram.inc diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc index 6e0dcf61a9..6f12756936 100644 --- a/src/cpu/intel/model_206ax/Makefile.inc +++ b/src/cpu/intel/model_206ax/Makefile.inc @@ -8,4 +8,4 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c -cpu_incs += $(src)/cpu/intel/model_206ax/cache_as_ram.inc +cpu_incs-y += $(src)/cpu/intel/model_206ax/cache_as_ram.inc diff --git a/src/cpu/intel/slot_1/Makefile.inc b/src/cpu/intel/slot_1/Makefile.inc index d480f78c61..1487f5e929 100644 --- a/src/cpu/intel/slot_1/Makefile.inc +++ b/src/cpu/intel/slot_1/Makefile.inc @@ -32,4 +32,4 @@ subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm subdirs-y += ../microcode -cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc +cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc diff --git a/src/cpu/intel/socket_BGA956/Makefile.inc b/src/cpu/intel/socket_BGA956/Makefile.inc index 601997241d..2325bb9e32 100644 --- a/src/cpu/intel/socket_BGA956/Makefile.inc +++ b/src/cpu/intel/socket_BGA956/Makefile.inc @@ -9,4 +9,4 @@ subdirs-y += ../hyperthreading subdirs-y += ../speedstep # Use Intel Core (not Core 2) code for CAR init, any CPU might be used. -cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc +cpu_incs-y += $(src)/cpu/intel/model_6ex/cache_as_ram.inc diff --git a/src/cpu/intel/socket_FC_PGA370/Makefile.inc b/src/cpu/intel/socket_FC_PGA370/Makefile.inc index 85454acea8..d9bb2270b0 100644 --- a/src/cpu/intel/socket_FC_PGA370/Makefile.inc +++ b/src/cpu/intel/socket_FC_PGA370/Makefile.inc @@ -26,4 +26,4 @@ subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm subdirs-y += ../microcode -cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc +cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc diff --git a/src/cpu/intel/socket_LGA771/Makefile.inc b/src/cpu/intel/socket_LGA771/Makefile.inc index 101fd04b65..8235fc52aa 100644 --- a/src/cpu/intel/socket_LGA771/Makefile.inc +++ b/src/cpu/intel/socket_LGA771/Makefile.inc @@ -8,4 +8,4 @@ subdirs-y += ../../x86/smm subdirs-y += ../microcode subdirs-y += ../hyperthreading -cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc +cpu_incs-y += $(src)/cpu/intel/model_6ex/cache_as_ram.inc diff --git a/src/cpu/intel/socket_PGA370/Makefile.inc b/src/cpu/intel/socket_PGA370/Makefile.inc index 3f5dfd0b7e..98b43942bf 100644 --- a/src/cpu/intel/socket_PGA370/Makefile.inc +++ b/src/cpu/intel/socket_PGA370/Makefile.inc @@ -26,4 +26,4 @@ subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm subdirs-y += ../microcode -cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc +cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc diff --git a/src/cpu/intel/socket_mFCBGA479/Makefile.inc b/src/cpu/intel/socket_mFCBGA479/Makefile.inc index 9e1444dcd2..e247c0966d 100644 --- a/src/cpu/intel/socket_mFCBGA479/Makefile.inc +++ b/src/cpu/intel/socket_mFCBGA479/Makefile.inc @@ -6,4 +6,4 @@ subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm subdirs-y += ../microcode -cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc +cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc diff --git a/src/cpu/intel/socket_mFCPGA478/Makefile.inc b/src/cpu/intel/socket_mFCPGA478/Makefile.inc index fa03f9346e..749f6abf06 100644 --- a/src/cpu/intel/socket_mFCPGA478/Makefile.inc +++ b/src/cpu/intel/socket_mFCPGA478/Makefile.inc @@ -11,4 +11,4 @@ subdirs-y += ../microcode subdirs-y += ../hyperthreading subdirs-y += ../speedstep -cpu_incs += $(src)/cpu/intel/model_6ex/cache_as_ram.inc +cpu_incs-y += $(src)/cpu/intel/model_6ex/cache_as_ram.inc diff --git a/src/cpu/intel/socket_mPGA479M/Makefile.inc b/src/cpu/intel/socket_mPGA479M/Makefile.inc index 7160894ee5..abade4e87e 100644 --- a/src/cpu/intel/socket_mPGA479M/Makefile.inc +++ b/src/cpu/intel/socket_mPGA479M/Makefile.inc @@ -9,4 +9,4 @@ subdirs-y += ../../x86/smm subdirs-y += ../microcode subdirs-y += ../hyperthreading -cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc +cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram.inc -- cgit v1.2.3