From b28b6b53cc51fef83eb290e746c91afcddc6eb49 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 1 Jul 2019 15:38:25 +0300 Subject: arch/x86: Flip HAVE_MONOTONIC_TIMER default MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Id56139a3d0840684b13179821a77bc8ae28e05ae Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34113 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/cpu/intel/haswell/Kconfig | 1 - src/cpu/intel/slot_1/Kconfig | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) (limited to 'src/cpu/intel') diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index 9cc040ec62..cb8bc77335 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -10,7 +10,6 @@ config CPU_SPECIFIC_OPTIONS select ARCH_VERSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 - select HAVE_MONOTONIC_TIMER select SMP select MMX select SSE2 diff --git a/src/cpu/intel/slot_1/Kconfig b/src/cpu/intel/slot_1/Kconfig index 890e33bbf8..adfc2da75a 100644 --- a/src/cpu/intel/slot_1/Kconfig +++ b/src/cpu/intel/slot_1/Kconfig @@ -26,6 +26,7 @@ config SLOT_SPECIFIC_OPTIONS # dummy select CPU_INTEL_MODEL_6BX select CPU_INTEL_MODEL_6XX select NO_SMM + select NO_MONOTONIC_TIMER config DCACHE_RAM_BASE hex -- cgit v1.2.3