From f6af8943e23b8ffa27df6ddb8e4a654387be0cb6 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sun, 15 Oct 2017 14:58:49 -0600 Subject: Intel i5000 board & chips: Remove - using LATE_CBMEM_INIT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit All boards and chips that are still using LATE_CBMEM_INIT are being removed as previously discussed. If these boards and chips are updated to not use LATE_CBMEM_INIT, they can be restored to the active codebase from the 4.7 branch. chips: northbridge/intel/i5000 Mainboards: mainboard/supermicro/x7db8 mainboard/asus/dsbf Change-Id: I6614c0033b4439d196f26819998d3f85e6d11c00 Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/22030 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/cpu/intel/Kconfig | 1 - src/cpu/intel/Makefile.inc | 1 - src/cpu/intel/socket_LGA771/Kconfig | 18 ------------------ src/cpu/intel/socket_LGA771/Makefile.inc | 12 ------------ 4 files changed, 32 deletions(-) delete mode 100644 src/cpu/intel/socket_LGA771/Kconfig delete mode 100644 src/cpu/intel/socket_LGA771/Makefile.inc (limited to 'src/cpu/intel') diff --git a/src/cpu/intel/Kconfig b/src/cpu/intel/Kconfig index bd4e690b40..612b62e85b 100644 --- a/src/cpu/intel/Kconfig +++ b/src/cpu/intel/Kconfig @@ -39,7 +39,6 @@ source src/cpu/intel/socket_mPGA604/Kconfig source src/cpu/intel/socket_PGA370/Kconfig source src/cpu/intel/socket_441/Kconfig source src/cpu/intel/socket_LGA1155/Kconfig -source src/cpu/intel/socket_LGA771/Kconfig source src/cpu/intel/socket_LGA775/Kconfig source src/cpu/intel/socket_rPGA988B/Kconfig source src/cpu/intel/socket_rPGA989/Kconfig diff --git a/src/cpu/intel/Makefile.inc b/src/cpu/intel/Makefile.inc index 8ee4a9dc6b..51c910a4d2 100644 --- a/src/cpu/intel/Makefile.inc +++ b/src/cpu/intel/Makefile.inc @@ -31,7 +31,6 @@ subdirs-$(CONFIG_NORTHBRIDGE_INTEL_FSP_RANGELEY) += fsp_model_406dx subdirs-$(CONFIG_CPU_INTEL_SLOT_2) += slot_2 subdirs-$(CONFIG_CPU_INTEL_SLOT_1) += slot_1 subdirs-$(CONFIG_CPU_INTEL_SOCKET_LGA1155) += socket_LGA1155 -subdirs-$(CONFIG_CPU_INTEL_SOCKET_LGA771) += socket_LGA771 subdirs-$(CONFIG_CPU_INTEL_SOCKET_LGA775) += socket_LGA775 #socket_mPGA604_533Mhz diff --git a/src/cpu/intel/socket_LGA771/Kconfig b/src/cpu/intel/socket_LGA771/Kconfig deleted file mode 100644 index d9bd44ddd8..0000000000 --- a/src/cpu/intel/socket_LGA771/Kconfig +++ /dev/null @@ -1,18 +0,0 @@ -config CPU_INTEL_SOCKET_LGA771 - bool - select CPU_INTEL_MODEL_6FX - select SSE2 - select MMX - select AP_IN_SIPI_WAIT - -if CPU_INTEL_SOCKET_LGA771 - -config DCACHE_RAM_BASE - hex - default 0xfefc0000 - -config DCACHE_RAM_SIZE - hex - default 0x8000 - -endif diff --git a/src/cpu/intel/socket_LGA771/Makefile.inc b/src/cpu/intel/socket_LGA771/Makefile.inc deleted file mode 100644 index d0a5b63264..0000000000 --- a/src/cpu/intel/socket_LGA771/Makefile.inc +++ /dev/null @@ -1,12 +0,0 @@ -subdirs-y += ../model_6ex -subdirs-y += ../model_6fx -subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache -subdirs-y += ../../x86/smm -subdirs-y += ../microcode -subdirs-y += ../hyperthreading - -cpu_incs-y += $(src)/cpu/intel/model_6ex/cache_as_ram.inc -romstage-y += ../car/romstage.c -- cgit v1.2.3