From 0682cfefdb888807bef6ee7f3bb81615282e0390 Mon Sep 17 00:00:00 2001 From: Hung-Te Lin Date: Tue, 6 Aug 2013 20:37:55 +0800 Subject: armv7/exynos5420: Configure CPU cores for kernel to enable SMP. The SMP on Exynos 5420 requires setting a special page and entry wrappers in firmware side (SRAM) so kernel can start cores (and to switch clusters). Change-Id: I77ca98bb6cff5b13e95dd29228e4536302f0aee9 Signed-off-by: Hung-Te Lin Reviewed-on: https://gerrit.chromium.org/gerrit/64770 Reviewed-by: Ronald G. Minnich (cherry picked from commit 4a11c7ab78cc0811df0f88763b0af8b9f24e5433) Signed-off-by: Isaac Christensen Reviewed-on: http://review.coreboot.org/6405 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Edward O'Callaghan --- src/cpu/samsung/exynos5420/Kconfig | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'src/cpu/samsung/exynos5420/Kconfig') diff --git a/src/cpu/samsung/exynos5420/Kconfig b/src/cpu/samsung/exynos5420/Kconfig index d7adf6cfde..606604091b 100644 --- a/src/cpu/samsung/exynos5420/Kconfig +++ b/src/cpu/samsung/exynos5420/Kconfig @@ -46,6 +46,11 @@ config CBFS_ROM_OFFSET # 0x0202_4400: variable length bootblock checksum header. # 0x0202_4410: bootblock, assume up to 32KB in size # 0x0203_0000: romstage, assume up to 128KB in size. +# 0x0206_0000: cache for CBFS data. +# 0x0207_3000: shared (with kernel) page for cpu & secondary core states. +# the shared data is currently only <0x50 bytes so we can share +# this page with stack. +# 0x0207_3100: stack bottom # 0x0207_4000: stack pointer config BOOTBLOCK_BASE @@ -71,11 +76,11 @@ config STACK_TOP config STACK_BOTTOM hex - default 0x02073000 + default 0x02073100 config STACK_SIZE hex - default 0x1000 + default 0x0f00 # TODO We may probably move this to board-specific implementation files instead # of KConfig values. -- cgit v1.2.3