From 6acaca7e409e914e6f1d8d58a864002678153ed5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Tue, 25 Jul 2017 15:12:12 +0300 Subject: AGESA: Remove separate f15rl MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I18c62ad034249c5ad14e5d5e708b4f0d4bcbf400 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/20774 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/cpu/x86/smm/smmhandler.S | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/cpu/x86/smm') diff --git a/src/cpu/x86/smm/smmhandler.S b/src/cpu/x86/smm/smmhandler.S index b57d015789..98d67d3c3c 100644 --- a/src/cpu/x86/smm/smmhandler.S +++ b/src/cpu/x86/smm/smmhandler.S @@ -141,8 +141,7 @@ untampered_lapic: /* This is an ugly hack, and we should find a way to read the CPU index * without relying on the LAPIC ID. */ -#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_TN) \ - || IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_RL) +#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_FAMILY15_TN) /* LAPIC IDs start from 0x10; map that to the proper core index */ subl $0x10, %ecx #endif -- cgit v1.2.3