From bebf66909a11201a1bbfbdf7f1af40285d76a457 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Wed, 24 Apr 2013 20:59:43 -0500 Subject: x86: use boot state callbacks to disable rom cache On x86 systems there is a concept of cachings the ROM. However, the typical policy is that the boot cpu is the only one with it enabled. In order to ensure the MTRRs are the same across cores the rom cache needs to be disabled prior to OS resume or boot handoff. Therefore, utilize the boot state callbacks to schedule the disabling of the ROM cache at the ramstage exit points. Change-Id: I4da5886d9f1cf4c6af2f09bb909f0d0f0faa4e62 Signed-off-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/3138 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/cpu/x86/mtrr/mtrr.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'src/cpu/x86') diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index 608912754c..b69787bf4a 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -408,10 +409,17 @@ void x86_mtrr_disable_rom_caching(void) enable_cache(); } -void disable_cache_rom(void) +static void disable_cache_rom(void *unused) { x86_mtrr_disable_rom_caching(); } + +BOOT_STATE_INIT_ENTRIES(disable_rom_cache_bscb) = { + BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, + disable_cache_rom, NULL), + BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, + disable_cache_rom, NULL), +}; #endif struct var_mtrr_state { -- cgit v1.2.3