From 16a3a7515a65940698ec0325b6d89d5f7c40ca3c Mon Sep 17 00:00:00 2001 From: Timothy Pearson Date: Thu, 3 Sep 2015 17:43:52 -0500 Subject: cpu/amd/family_10h-family_15h: Apply missing Family 15h errata fixes Change-Id: I132874fe5b5a8b9a87422e2f07bff03bc5863ca4 Signed-off-by: Timothy Pearson Reviewed-on: https://review.coreboot.org/12065 Reviewed-by: Felix Held Tested-by: build bot (Jenkins) --- src/cpu/amd/family_10h-family_15h/defaults.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'src/cpu') diff --git a/src/cpu/amd/family_10h-family_15h/defaults.h b/src/cpu/amd/family_10h-family_15h/defaults.h index 7fd115c93f..28df747971 100644 --- a/src/cpu/amd/family_10h-family_15h/defaults.h +++ b/src/cpu/amd/family_10h-family_15h/defaults.h @@ -162,6 +162,14 @@ static const struct { 0x0000000C, 0x00000000, 0x0000000C, 0x00000000}, /* Cx and Dx multiple-link processor */ + { OSVW_ID_Length, AMD_FAM15_ALL, AMD_PTYPE_ALL, + 0x00000005, 0x00000000, + 0x0000ffff, 0x00000000}, /* OSVW_ID_Length = 0x5 */ + + { OSVW_Status, AMD_FAM15_ALL, AMD_PTYPE_ALL, + 0x00000010, 0x00000000, + 0xffffffff, 0x00000000}, /* OsvwId4 = 0x1 */ + { BU_CFG2, AMD_DR_Dx, AMD_PTYPE_ALL, 0x00000000, 1 << (50-32), 0x00000000, 1 << (50-32)}, /* D0 or Above, RdMmExtCfgQwEn*/ @@ -621,6 +629,10 @@ static const struct { { 3, 0x1b8, (AMD_FAM10_ALL | AMD_FAM15_ALL), AMD_PTYPE_ALL, 0x00001000, 0x00001000 }, /* [12] = L3PrivReplEn */ + /* Errata 504 workaround */ + { 3, 0x1b8, AMD_FAM15_ALL, AMD_PTYPE_ALL, + 0x00040000, 0x00040000 }, /* [18] = 1b */ + /* IBS Control Register */ { 3, 0x1cc, (AMD_FAM10_ALL | AMD_FAM15_ALL), AMD_PTYPE_ALL, 0x00000100, 0x00000100 }, /* [8] = LvtOffsetVal */ -- cgit v1.2.3