From 21724934d5b498f76bbe309584f4321e6f719fac Mon Sep 17 00:00:00 2001 From: Timothy Pearson Date: Tue, 24 Nov 2015 14:12:04 -0600 Subject: cpu/amd/fam10h-15h: Add workaround for AMD Erratum 600 Change-Id: Ie175b5b490f77cc380536ebd737da8618d4b448b Signed-off-by: Timothy Pearson Reviewed-on: https://review.coreboot.org/13170 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held Tested-by: Raptor Engineering Automated Test Stand --- src/cpu/amd/family_10h-family_15h/defaults.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/cpu') diff --git a/src/cpu/amd/family_10h-family_15h/defaults.h b/src/cpu/amd/family_10h-family_15h/defaults.h index 3618cb8f70..88950a3314 100644 --- a/src/cpu/amd/family_10h-family_15h/defaults.h +++ b/src/cpu/amd/family_10h-family_15h/defaults.h @@ -270,6 +270,10 @@ static const struct { ForceErrType = 0x0, MultRetryErr = 0x0 */ + /* Errata 600 */ + { 0, 0x150, AMD_OR_B2, AMD_PTYPE_ALL, + 0x00000000, 0x00000e00 }, /* HtRetryCrcDatIns = 0x0 */ + /* Errata 351 * System software should program the Link Extended Control Registers[LS2En] * (F0x[18C:170][8]) to 0b for all links. System software should also -- cgit v1.2.3