From 2f91403303a66c5e724761a74863e3452291b154 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Fri, 15 Jan 2016 10:20:11 -0700 Subject: src: Fix various spelling and whitespace issues. This fixes some spelling and whitespace issues that I came across while working on various things in the tree. There are no functional changes. Change-Id: I33bc77282f2f94a1fc5f1bc713e44f72db20c1ab Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/13016 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/cpu/x86/mtrr/mtrr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/cpu') diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index ed5613c812..efd0b68368 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -92,7 +92,7 @@ static void enable_var_mtrr(unsigned char deftype) wrmsr(MTRR_DEF_TYPE_MSR, msr); } -/* fms: find most sigificant bit set, stolen from Linux Kernel Source. */ +/* fms: find most significant bit set, stolen from Linux Kernel Source. */ static inline unsigned int fms(unsigned int x) { int r; @@ -209,7 +209,7 @@ static struct memranges *get_physical_address_space(void) filter_vga_wrcomb); /* The address space below 4GiB is special. It needs to be - * covered entirly by range entries so that MTRR calculations + * covered entirely by range entries so that MTRR calculations * can be properly done for the full 32-bit address space. * Therefore, ensure holes are filled up to 4GiB as * uncacheable */ -- cgit v1.2.3