From 3bff8b523fd830925bf1c6e2398e4caec960577c Mon Sep 17 00:00:00 2001 From: Xavi Drudis Ferran Date: Sun, 22 Aug 2010 20:00:42 +0000 Subject: I've checked Revision Guide for AMD Family10h processors (#41322) rev 3.74 June 2010 for errata 351 and it agrees with the comment on setting ForceFullT0= 000b but I believe the code didn't honor the comment. Signed-off-by: Xavi Drudis Ferran Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5736 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/amd/model_10xxx/defaults.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/cpu') diff --git a/src/cpu/amd/model_10xxx/defaults.h b/src/cpu/amd/model_10xxx/defaults.h index 7bf9ccb52d..2fbfbb26fc 100644 --- a/src/cpu/amd/model_10xxx/defaults.h +++ b/src/cpu/amd/model_10xxx/defaults.h @@ -161,7 +161,7 @@ static const struct { /* Link Global Extended Control Register */ { 0, 0x16C, AMD_DRBA23_RBC2, AMD_PTYPE_ALL, - 0x00000014, 0x0000003F }, /* [15:13] ForceFullT0 = 0b, + 0x00000014, 0x0000E03F }, /* [15:13] ForceFullT0 = 0b, * Set T0Time 14h per BKDG */ -- cgit v1.2.3