From 4829af17e3171da803532e9757100cc9f70d70ec Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Wed, 27 Feb 2019 14:23:18 +0100 Subject: cpu/intel: Rename socket_mFCPGA478 to socket_m The name was wrong. mFCPGA478 is actually a pseudonym for mPGA478MN, the successor of the socket that was meant. The official name of this socket is mPGA478MT. But "Socket M" is much easier to distinguish. Change-Id: I4efeaca69acddfcdc5e957b0b521544314d46eeb Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/31642 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Paul Menzel --- src/cpu/intel/Kconfig | 2 +- src/cpu/intel/Makefile.inc | 2 +- src/cpu/intel/socket_m/Kconfig | 23 +++++++++++++++++++++++ src/cpu/intel/socket_m/Makefile.inc | 17 +++++++++++++++++ src/cpu/intel/socket_mFCPGA478/Kconfig | 23 ----------------------- src/cpu/intel/socket_mFCPGA478/Makefile.inc | 17 ----------------- 6 files changed, 42 insertions(+), 42 deletions(-) create mode 100644 src/cpu/intel/socket_m/Kconfig create mode 100644 src/cpu/intel/socket_m/Makefile.inc delete mode 100644 src/cpu/intel/socket_mFCPGA478/Kconfig delete mode 100644 src/cpu/intel/socket_mFCPGA478/Makefile.inc (limited to 'src/cpu') diff --git a/src/cpu/intel/Kconfig b/src/cpu/intel/Kconfig index 4fd8efbbcf..bdf5b5469d 100644 --- a/src/cpu/intel/Kconfig +++ b/src/cpu/intel/Kconfig @@ -22,7 +22,7 @@ source src/cpu/intel/slot_1/Kconfig source src/cpu/intel/socket_BGA956/Kconfig source src/cpu/intel/socket_BGA1284/Kconfig source src/cpu/intel/socket_FCBGA559/Kconfig -source src/cpu/intel/socket_mFCPGA478/Kconfig +source src/cpu/intel/socket_m/Kconfig source src/cpu/intel/socket_mPGA478MN/Kconfig source src/cpu/intel/socket_mPGA604/Kconfig source src/cpu/intel/socket_441/Kconfig diff --git a/src/cpu/intel/Makefile.inc b/src/cpu/intel/Makefile.inc index 3ed32971f6..e4d3f846bc 100644 --- a/src/cpu/intel/Makefile.inc +++ b/src/cpu/intel/Makefile.inc @@ -8,7 +8,7 @@ subdirs-$(CONFIG_CPU_INTEL_SOCKET_441) += socket_441 subdirs-$(CONFIG_CPU_INTEL_SOCKET_BGA956) += socket_BGA956 subdirs-$(CONFIG_CPU_INTEL_SOCKET_BGA1284) += socket_BGA1284 subdirs-$(CONFIG_CPU_INTEL_SOCKET_FCBGA559) += socket_FCBGA559 -subdirs-$(CONFIG_CPU_INTEL_SOCKET_MFCPGA478) += socket_mFCPGA478 +subdirs-$(CONFIG_CPU_INTEL_SOCKET_M) += socket_m subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA478MN) += socket_mPGA478MN subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA604) += socket_mPGA604 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_NEHALEM) += model_2065x diff --git a/src/cpu/intel/socket_m/Kconfig b/src/cpu/intel/socket_m/Kconfig new file mode 100644 index 0000000000..aadc9a47b0 --- /dev/null +++ b/src/cpu/intel/socket_m/Kconfig @@ -0,0 +1,23 @@ +config CPU_INTEL_SOCKET_M + bool + +if CPU_INTEL_SOCKET_M + +config SOCKET_SPECIFIC_OPTIONS # dummy + def_bool y + select CPU_INTEL_MODEL_69X + select CPU_INTEL_MODEL_6DX + select CPU_INTEL_MODEL_6EX + select CPU_INTEL_MODEL_6FX + select MMX + select SSE + +config DCACHE_RAM_BASE + hex + default 0xfefc0000 + +config DCACHE_RAM_SIZE + hex + default 0x8000 + +endif diff --git a/src/cpu/intel/socket_m/Makefile.inc b/src/cpu/intel/socket_m/Makefile.inc new file mode 100644 index 0000000000..139b1bb624 --- /dev/null +++ b/src/cpu/intel/socket_m/Makefile.inc @@ -0,0 +1,17 @@ +subdirs-y += ../model_69x +subdirs-y += ../model_6dx +subdirs-y += ../model_6ex +subdirs-y += ../model_6fx +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/smm +subdirs-y += ../microcode +subdirs-y += ../hyperthreading +subdirs-y += ../speedstep + +cpu_incs-y += $(src)/cpu/intel/car/core2/cache_as_ram.S +postcar-y += ../car/p4-netburst/exit_car.S + +romstage-y += ../car/romstage.c diff --git a/src/cpu/intel/socket_mFCPGA478/Kconfig b/src/cpu/intel/socket_mFCPGA478/Kconfig deleted file mode 100644 index 503ad64172..0000000000 --- a/src/cpu/intel/socket_mFCPGA478/Kconfig +++ /dev/null @@ -1,23 +0,0 @@ -config CPU_INTEL_SOCKET_MFCPGA478 - bool - -if CPU_INTEL_SOCKET_MFCPGA478 - -config SOCKET_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_INTEL_MODEL_69X - select CPU_INTEL_MODEL_6DX - select CPU_INTEL_MODEL_6EX - select CPU_INTEL_MODEL_6FX - select MMX - select SSE - -config DCACHE_RAM_BASE - hex - default 0xfefc0000 - -config DCACHE_RAM_SIZE - hex - default 0x8000 - -endif diff --git a/src/cpu/intel/socket_mFCPGA478/Makefile.inc b/src/cpu/intel/socket_mFCPGA478/Makefile.inc deleted file mode 100644 index 139b1bb624..0000000000 --- a/src/cpu/intel/socket_mFCPGA478/Makefile.inc +++ /dev/null @@ -1,17 +0,0 @@ -subdirs-y += ../model_69x -subdirs-y += ../model_6dx -subdirs-y += ../model_6ex -subdirs-y += ../model_6fx -subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr -subdirs-y += ../../x86/lapic -subdirs-y += ../../x86/cache -subdirs-y += ../../x86/smm -subdirs-y += ../microcode -subdirs-y += ../hyperthreading -subdirs-y += ../speedstep - -cpu_incs-y += $(src)/cpu/intel/car/core2/cache_as_ram.S -postcar-y += ../car/p4-netburst/exit_car.S - -romstage-y += ../car/romstage.c -- cgit v1.2.3