From 5a1f9a87cb2f6a3e0699f3d13db41c7da2963b88 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Thu, 7 Sep 2017 21:17:33 -0600 Subject: cpu/x86/mp_init: remove adjust_cpu_apic_entry() The original purpose of adjust_cpu_apic_entry() was to set up an APIC map. That map was effectively only used for mapping *default* APIC id to CPU number in the SMM handler. The normal AP startup path didn't need this mapping because it was whoever won the race got the next cpu number. Instead of statically calculating (and wrong) just initialize the default APIC id map when the APs come online. Once the APs are online the SMM handler is loaded and the mapping is utilized. Change-Id: Idff3b8cfc17aef0729d3193b4499116a013b7930 Signed-off-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/21452 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Subrata Banik Reviewed-by: Marshall Dawson --- src/cpu/intel/haswell/haswell_init.c | 12 ------------ src/cpu/x86/mp_init.c | 38 ++++++++++++++++++------------------ 2 files changed, 19 insertions(+), 31 deletions(-) (limited to 'src/cpu') diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c index e850fd1ae6..aa7711bf5c 100644 --- a/src/cpu/intel/haswell/haswell_init.c +++ b/src/cpu/intel/haswell/haswell_init.c @@ -712,7 +712,6 @@ static void haswell_init(struct device *cpu) /* MP initialization support. */ static const void *microcode_patch; -static int ht_disabled; static void pre_mp_init(void) { @@ -740,8 +739,6 @@ static int get_cpu_count(void) printk(BIOS_DEBUG, "CPU has %u cores, %u threads enabled.\n", num_cores, num_threads); - ht_disabled = num_threads == num_cores; - return num_threads; } @@ -752,14 +749,6 @@ static void get_microcode_info(const void **microcode, int *parallel) *parallel = 1; } -static int adjust_apic_id(int index, int apic_id) -{ - if (ht_disabled) - return 2 * index; - else - return index; -} - static void per_cpu_smm_trigger(void) { /* Relocate the SMM handler. */ @@ -784,7 +773,6 @@ static const struct mp_ops mp_ops = { .get_cpu_count = get_cpu_count, .get_smm_info = smm_info, .get_microcode_info = get_microcode_info, - .adjust_cpu_apic_entry = adjust_apic_id, .pre_mp_smm_init = smm_initialize, .per_cpu_smm_trigger = per_cpu_smm_trigger, .relocation_handler = smm_relocation_handler, diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 4eb9519c7c..046aa60ec7 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -82,9 +82,6 @@ struct mp_params { int num_cpus; /* Total cpus include BSP */ int parallel_microcode_load; const void *microcode_pointer; - /* adjust_apic_id() is called for every potential APIC id in the - * system up from 0 to CONFIG_MAX_CPUS. Return adjusted apic_id. */ - int (*adjust_apic_id)(int index, int apic_id); /* Flight plan for APs and BSP. */ struct mp_flight_record *flight_plan; int num_records; @@ -133,12 +130,19 @@ static struct mp_flight_plan mp_info; struct cpu_map { struct device *dev; - int apic_id; + /* Keep track of default apic ids for SMM. */ + int default_apic_id; }; /* Keep track of APIC and device structure for each CPU. */ static struct cpu_map cpus[CONFIG_MAX_CPUS]; +static inline void add_cpu_map_entry(const struct cpu_info *info) +{ + cpus[info->index].dev = info->cpu; + cpus[info->index].default_apic_id = cpuid_ebx(1) >> 24; +} + inline void barrier_wait(atomic_t *b) { while (atomic_read(b) == 0) @@ -218,7 +222,6 @@ static void park_this_cpu(void) static void asmlinkage ap_init(unsigned int cpu) { struct cpu_info *info; - int apic_id; /* Ensure the local APIC is enabled */ enable_lapic(); @@ -226,13 +229,15 @@ static void asmlinkage ap_init(unsigned int cpu) info = cpu_info(); info->index = cpu; info->cpu = cpus[cpu].dev; + + add_cpu_map_entry(info); thread_init_cpu_info_non_bsp(info); - apic_id = lapicid(); - info->cpu->path.apic.apic_id = apic_id; - cpus[cpu].apic_id = apic_id; + /* Fix up APIC id with reality. */ + info->cpu->path.apic.apic_id = lapicid(); - printk(BIOS_INFO, "AP: slot %d apic_id %x.\n", cpu, apic_id); + printk(BIOS_INFO, "AP: slot %d apic_id %x.\n", cpu, + info->cpu->path.apic.apic_id); /* Walk the flight plan */ ap_do_flight_plan(); @@ -399,16 +404,13 @@ static int allocate_cpu_devices(struct bus *cpu_bus, struct mp_params *p) for (i = 1; i < max_cpus; i++) { struct device_path cpu_path; struct device *new; - int apic_id; /* Build the CPU device path */ cpu_path.type = DEVICE_PATH_APIC; - /* Assuming linear APIC space allocation. */ - apic_id = info->cpu->path.apic.apic_id + i; - if (p->adjust_apic_id != NULL) - apic_id = p->adjust_apic_id(i, apic_id); - cpu_path.apic.apic_id = apic_id; + /* Assuming linear APIC space allocation. AP will set its own + APIC id in the ap_init() path above. */ + cpu_path.apic.apic_id = info->cpu->path.apic.apic_id + i; /* Allocate the new CPU device structure */ new = alloc_find_dev(cpu_bus, &cpu_path); @@ -583,8 +585,7 @@ static void init_bsp(struct bus *cpu_bus) printk(BIOS_CRIT, "BSP index(%d) != 0!\n", info->index); /* Track BSP in cpu_map structures. */ - cpus[info->index].dev = info->cpu; - cpus[info->index].apic_id = cpu_path.apic.apic_id; + add_cpu_map_entry(info); } /* @@ -668,7 +669,7 @@ static int mp_get_apic_id(int cpu_slot) if (cpu_slot >= CONFIG_MAX_CPUS || cpu_slot < 0) return -1; - return cpus[cpu_slot].apic_id; + return cpus[cpu_slot].default_apic_id; } void smm_initiate_relocation_parallel(void) @@ -1015,7 +1016,6 @@ int mp_init_with_smm(struct bus *cpu_bus, const struct mp_ops *mp_ops) if (mp_state.ops.get_microcode_info != NULL) mp_state.ops.get_microcode_info(&mp_params.microcode_pointer, &mp_params.parallel_microcode_load); - mp_params.adjust_apic_id = mp_state.ops.adjust_cpu_apic_entry; mp_params.flight_plan = &mp_steps[0]; mp_params.num_records = ARRAY_SIZE(mp_steps); -- cgit v1.2.3