From 6fe0cab205e131525efbfce4f59da344b1e76598 Mon Sep 17 00:00:00 2001 From: Hung-Te Lin Date: Tue, 22 Jan 2013 18:57:56 +0800 Subject: Extend CBFS to support arbitrary ROM source media. Summary: Isolate CBFS underlying I/O to board/arch-specific implementations as "media stream", to allow loading and booting romstage on non-x86. CBFS functions now all take a new "media source" parameter; use CBFS_DEFAULT_MEDIA if you simply want to load from main firmware. API Changes: cbfs_find => cbfs_get_file. cbfs_find_file => cbfs_get_file_content. cbfs_get_file => cbfs_get_file_content with correct type. CBFS used to work only on memory-mapped ROM (all x86). For platforms like ARM, the ROM may come from USB, UART, or SPI -- any serial devices and not available for memory mapping. To support these devices (and allowing CBFS to read from multiple source at the same time), CBFS operations are now virtual-ized into "cbfs_media". To simplify porting existing code, every media source must support both "reading into pre-allocated memory (read)" and "read and return an allocated buffer (map)". For devices without native memory-mapped ROM, "cbfs_simple_buffer*" provides simple memory mapping simulation. Every CBFS function now takes a cbfs_media* as parameter. CBFS_DEFAULT_MEDIA is defined for CBFS functions to automatically initialize a per-board default media (CBFS will internally calls init_default_cbfs_media). Also revised CBFS function names relying on memory mapped backend (ex, "cbfs_find" => actually loads files). Now we only have two getters: struct cbfs_file *entry = cbfs_get_file(media, name); void *data = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, name, type); Test results: - Verified to work on x86/qemu. - Compiles on ARM, and follow up commit will provide working SPI driver. Change-Id: Iac911ded25a6f2feffbf3101a81364625bb07746 Signed-off-by: Hung-Te Lin Reviewed-on: http://review.coreboot.org/2182 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/cpu/intel/microcode/microcode.c | 5 +++-- src/cpu/samsung/exynos5-common/Makefile.inc | 4 ++-- src/cpu/samsung/exynos5-common/spi.c | 7 +++++++ src/cpu/samsung/exynos5250/Kconfig | 16 ++++++++++++++++ src/cpu/via/nano/update_ucode.c | 2 +- 5 files changed, 29 insertions(+), 5 deletions(-) create mode 100644 src/cpu/samsung/exynos5-common/spi.c (limited to 'src/cpu') diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c index 15d6513b33..713a6df19b 100644 --- a/src/cpu/intel/microcode/microcode.c +++ b/src/cpu/intel/microcode/microcode.c @@ -166,8 +166,9 @@ void intel_update_microcode_from_cbfs(void) #ifdef __PRE_RAM__ microcode_blob = walkcbfs((char *) MICROCODE_CBFS_FILE); #else - microcode_blob = cbfs_find_file(MICROCODE_CBFS_FILE, - CBFS_TYPE_MICROCODE); + microcode_blob = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, + MICROCODE_CBFS_FILE, + CBFS_TYPE_MICROCODE); #endif intel_update_microcode(microcode_blob); } diff --git a/src/cpu/samsung/exynos5-common/Makefile.inc b/src/cpu/samsung/exynos5-common/Makefile.inc index cad6cb3de7..d919347836 100644 --- a/src/cpu/samsung/exynos5-common/Makefile.inc +++ b/src/cpu/samsung/exynos5-common/Makefile.inc @@ -1,2 +1,2 @@ -#romstage-y += soc.c -romstage-y += spl_boot.c +romstage-y += spi.c +ramstage-y += spi.c diff --git a/src/cpu/samsung/exynos5-common/spi.c b/src/cpu/samsung/exynos5-common/spi.c new file mode 100644 index 0000000000..e13eadf3fe --- /dev/null +++ b/src/cpu/samsung/exynos5-common/spi.c @@ -0,0 +1,7 @@ +#include + +/* TODO provide a real SPI driver here for firmware media. */ + +int init_default_cbfs_media(struct cbfs_media *media) { + return -1; +} diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig index f5beddcdb4..41a1446ef2 100644 --- a/src/cpu/samsung/exynos5250/Kconfig +++ b/src/cpu/samsung/exynos5250/Kconfig @@ -48,6 +48,22 @@ config ROMSTAGE_SIZE hex default 0x10000 +# TODO Change this to some better address not overlapping bootblock when +# cbfstool supports creating header in arbitrary location. +config CBFS_HEADER_ROM_OFFSET + hex "offset of master CBFS header in ROM" + default 0x2040 + +# TODO We may probably move this to board-specific implementation files instead +# of KConfig values. +config CBFS_CACHE_ADDRESS + hex "memory address to put CBFS cache data" + default 0x02060000 + +config CBFS_CACHE_SIZE + hex "size of CBFS cache data" + default 0x000017000 + # FIXME: This is for copying SPI content into SRAM temporarily and # will be removed when we have the SPI streaming driver implemented. config SPI_IMAGE_HACK diff --git a/src/cpu/via/nano/update_ucode.c b/src/cpu/via/nano/update_ucode.c index 8f7ee224a4..d5757f87a7 100644 --- a/src/cpu/via/nano/update_ucode.c +++ b/src/cpu/via/nano/update_ucode.c @@ -105,7 +105,7 @@ unsigned int nano_update_ucode(void) const struct cbfs_file *cbfs_ucode; u32 fms = cpuid_eax(0x1); - cbfs_ucode = cbfs_find("cpu_microcode_blob.bin"); + cbfs_ucode = cbfs_get_file(CBFS_DEFAULT_MEDIA, "cpu_microcode_blob.bin"); /* Oops, did you forget to include the microcode ? */ if(cbfs_ucode == NULL) { printk(BIOS_ALERT, "WARNING: No microcode file found in CBFS. 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