From 88a67f0cc9d0bec08a6cfa5b1c3f4198fd98ab4f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Thu, 12 Dec 2013 12:27:53 +0200 Subject: AMD boards (non-AGESA): Cleanup earlymtrr.c includes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I5f4bf9dbaf3470dc83d3e980bb6cab10801e15c1 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/4523 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Bruce Griffith --- src/cpu/amd/car/post_cache_as_ram.c | 2 +- src/cpu/amd/model_10xxx/Makefile.inc | 1 + src/cpu/amd/model_10xxx/init_cpus.c | 1 - src/cpu/amd/model_fxx/Makefile.inc | 2 ++ src/cpu/x86/mtrr/earlymtrr.c | 11 ++++------- 5 files changed, 8 insertions(+), 9 deletions(-) (limited to 'src/cpu') diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c index 3fe496e44c..3b3738c99a 100644 --- a/src/cpu/amd/car/post_cache_as_ram.c +++ b/src/cpu/amd/car/post_cache_as_ram.c @@ -4,9 +4,9 @@ #include #include #include +#include #include "cbmem.h" #include "cpu/amd/car/disable_cache_as_ram.c" -#include "cpu/x86/mtrr/earlymtrr.c" static inline void print_debug_pcar(const char *strval, uint32_t val) { diff --git a/src/cpu/amd/model_10xxx/Makefile.inc b/src/cpu/amd/model_10xxx/Makefile.inc index c78f6403d8..c82a26e135 100644 --- a/src/cpu/amd/model_10xxx/Makefile.inc +++ b/src/cpu/amd/model_10xxx/Makefile.inc @@ -1,3 +1,4 @@ +romstage-y += ../../x86/mtrr/earlymtrr.c ramstage-y += model_10xxx_init.c ramstage-y += processor_name.c diff --git a/src/cpu/amd/model_10xxx/init_cpus.c b/src/cpu/amd/model_10xxx/init_cpus.c index 3ebd7f2358..ed009d72a4 100644 --- a/src/cpu/amd/model_10xxx/init_cpus.c +++ b/src/cpu/amd/model_10xxx/init_cpus.c @@ -25,7 +25,6 @@ #include #include -#include #include #include diff --git a/src/cpu/amd/model_fxx/Makefile.inc b/src/cpu/amd/model_fxx/Makefile.inc index e016235f7e..eb62640656 100644 --- a/src/cpu/amd/model_fxx/Makefile.inc +++ b/src/cpu/amd/model_fxx/Makefile.inc @@ -1,3 +1,5 @@ +romstage-y += ../../x86/mtrr/earlymtrr.c + # no conditionals here. If you include this file from a socket, then you get all the binaries. ramstage-y += model_fxx_init.c ramstage-y += model_fxx_update_microcode.c diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c index f16da279c6..36f94cdf05 100644 --- a/src/cpu/x86/mtrr/earlymtrr.c +++ b/src/cpu/x86/mtrr/earlymtrr.c @@ -1,13 +1,12 @@ -#ifndef EARLYMTRR_C -#define EARLYMTRR_C #include #include #include -#include -static void set_var_mtrr( +#ifdef __ROMCC__ +static +#endif +void set_var_mtrr( unsigned reg, unsigned base, unsigned size, unsigned type) - { /* Bit Bit 32-35 of MTRRphysMask should be set to 1 */ /* FIXME: It only support 4G less range */ @@ -104,5 +103,3 @@ static inline int early_mtrr_init_detected(void) return msr.lo & MTRRdefTypeEn; } #endif - -#endif /* EARLYMTRR_C */ -- cgit v1.2.3