From 97b76f71915663aae82ca81568363eeda17fff87 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Thu, 19 Nov 2020 16:41:28 +0200 Subject: arch/x86: Link gdt_init.S into bootblock MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Followup work forces gdtptr and gdt towards the top of bootblock. They need to be realmode-addressable, i.e. within top 64 KiB or same segment with .reset. Change-Id: Ib6f23b2808d0a7e0d277d00a9b0f30c49fdefdd5 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/47965 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/cpu/x86/16bit/entry16.inc | 2 +- src/cpu/x86/32bit/entry32.inc | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) (limited to 'src/cpu') diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/16bit/entry16.inc index 2665cc69ae..5e90da1413 100644 --- a/src/cpu/x86/16bit/entry16.inc +++ b/src/cpu/x86/16bit/entry16.inc @@ -124,7 +124,7 @@ _start16bit: ljmpl $ROM_CODE_SEG, $__protected_start /** - * The gdt is defined in entry32.inc, it has a 4 Gb code segment + * The gdt is defined in gdt_init.S, it has a 4 Gb code segment * at 0x08, and a 4 GB data segment at 0x10; */ __gdtptr: diff --git a/src/cpu/x86/32bit/entry32.inc b/src/cpu/x86/32bit/entry32.inc index 85094483e5..873a809616 100644 --- a/src/cpu/x86/32bit/entry32.inc +++ b/src/cpu/x86/32bit/entry32.inc @@ -4,7 +4,6 @@ #include #include -#include .code32 /* -- cgit v1.2.3