From bd79c5eaf1f13f33c43c99657f24fa4c0330619a Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Fri, 28 Nov 2014 22:35:36 +0100 Subject: Replace hlt() loops with halt() Change-Id: I8486e70615f4c404a342cb86963b5357a934c41d Signed-off-by: Patrick Georgi Reviewed-on: http://review.coreboot.org/7606 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan --- src/cpu/intel/haswell/romstage.c | 5 ++--- src/cpu/x86/lapic/lapic_cpu_init.c | 6 ++---- 2 files changed, 4 insertions(+), 7 deletions(-) (limited to 'src/cpu') diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index edb2fdfccf..bd2513f5e2 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -49,9 +50,7 @@ static inline void reset_system(void) { hard_reset(); - while (1) { - hlt(); - } + halt(); } /* The cache-as-ram assembly file calls romstage_main() after setting up diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c index 018924f11d..61b6bd72f7 100644 --- a/src/cpu/x86/lapic/lapic_cpu_init.c +++ b/src/cpu/x86/lapic/lapic_cpu_init.c @@ -23,10 +23,10 @@ #include #include #include +#include #include #include #include -#include #include #include #include @@ -396,9 +396,7 @@ void stop_this_cpu(void) #endif } - while(1) { - hlt(); - } + halt(); } #endif -- cgit v1.2.3