From 5b14116a04b4b96d25f825bef8f34caf4bd51466 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Wed, 23 Jan 2019 16:02:28 +0200 Subject: device/pci_early.c: Drop some guards MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With PCI_DEV() always defined it is no longer necessary to exclude this code from building. Change-Id: I58a6348750d240aa6024599f7b1af1449f31e8ac Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/31303 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/device/Makefile.inc | 3 --- src/device/pci_early.c | 7 ++----- 2 files changed, 2 insertions(+), 8 deletions(-) (limited to 'src/device') diff --git a/src/device/Makefile.inc b/src/device/Makefile.inc index bed0f718ee..39df1c7b9c 100644 --- a/src/device/Makefile.inc +++ b/src/device/Makefile.inc @@ -13,7 +13,6 @@ ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += pnp_device.c ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_64) += pnp_device.c ramstage-$(CONFIG_PCI) += pci_ops.c ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c -ramstage-$(CONFIG_PCI) += pci_early.c ramstage-$(CONFIG_PCI) += pci_rom.c ramstage-y += smbus_ops.c @@ -28,12 +27,10 @@ verstage-y += device_const.c romstage-y += device_const.c ramstage-y += device_const.c -ifeq ($(CONFIG_ARCH_X86),y) bootblock-$(CONFIG_PCI) += pci_early.c verstage-$(CONFIG_PCI) += pci_early.c romstage-$(CONFIG_PCI) += pci_early.c postcar-$(CONFIG_PCI) += pci_early.c -endif subdirs-y += oprom dram diff --git a/src/device/pci_early.c b/src/device/pci_early.c index 4cf8c7e68c..9086e64b85 100644 --- a/src/device/pci_early.c +++ b/src/device/pci_early.c @@ -18,9 +18,10 @@ #include #include #include +#include +#include #include -#if !ENV_RAMSTAGE unsigned pci_find_next_capability(pci_devfn_t dev, unsigned cap, unsigned last) { unsigned pos = 0; @@ -68,9 +69,6 @@ unsigned pci_find_capability(pci_devfn_t dev, unsigned cap) { return pci_find_next_capability(dev, cap, 0); } -#endif - -#if IS_ENABLED(CONFIG_EARLY_PCI_BRIDGE) static void pci_bridge_reset_secondary(pci_devfn_t p2p_bridge) { @@ -167,4 +165,3 @@ void pci_early_bridge_init(void) pci_early_mmio_window(p2p_bridge, CONFIG_EARLY_PCI_MMIO_BASE, 0x4000); } -#endif /* CONFIG_EARLY_PCI_BRIDGE */ -- cgit v1.2.3