From cd49cce7b70e80b4acc49b56bb2bb94370b4d867 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Tue, 5 Mar 2019 16:53:33 -0800 Subject: coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/device/device.c | 12 ++++++------ src/device/device_const.c | 2 +- src/device/oprom/include/io.h | 2 +- src/device/oprom/include/x86emu/fpu_regs.h | 2 +- src/device/oprom/include/x86emu/regs.h | 2 +- src/device/oprom/include/x86emu/x86emu.h | 4 ++-- src/device/oprom/realmode/x86.c | 8 ++++---- src/device/oprom/realmode/x86_interrupts.c | 2 +- src/device/oprom/yabel/biosemu.c | 30 +++++++++++++++--------------- src/device/oprom/yabel/compat/functions.c | 6 +++--- src/device/oprom/yabel/debug.h | 6 +++--- src/device/oprom/yabel/device.c | 18 +++++++++--------- src/device/oprom/yabel/device.h | 12 ++++++------ src/device/oprom/yabel/interrupt.c | 16 ++++++++-------- src/device/oprom/yabel/io.c | 10 +++++----- src/device/oprom/yabel/mem.c | 4 ++-- src/device/oprom/yabel/vbe.c | 6 +++--- src/device/pci_device.c | 24 ++++++++++++------------ src/device/pci_rom.c | 10 +++++----- src/device/pciexp_device.c | 8 ++++---- src/device/root_device.c | 4 ++-- 21 files changed, 94 insertions(+), 94 deletions(-) (limited to 'src/device') diff --git a/src/device/device.c b/src/device/device.c index 527298ce16..ae0dbdb1d7 100644 --- a/src/device/device.c +++ b/src/device/device.c @@ -45,7 +45,7 @@ #include #include #include -#if IS_ENABLED(CONFIG_ARCH_X86) +#if CONFIG(ARCH_X86) #include #endif #include @@ -99,7 +99,7 @@ void dev_finalize_chips(void) DECLARE_SPIN_LOCK(dev_lock) -#if IS_ENABLED(CONFIG_GFXUMA) +#if CONFIG(GFXUMA) /* IGD UMA memory */ uint64_t uma_memory_base = 0; uint64_t uma_memory_size = 0; @@ -1129,7 +1129,7 @@ static void init_dev(struct device *dev) return; if (!dev->initialized && dev->ops && dev->ops->init) { -#if IS_ENABLED(CONFIG_HAVE_MONOTONIC_TIMER) +#if CONFIG(HAVE_MONOTONIC_TIMER) struct stopwatch sw; stopwatch_init(&sw); #endif @@ -1141,7 +1141,7 @@ static void init_dev(struct device *dev) printk(BIOS_DEBUG, "%s init ...\n", dev_path(dev)); dev->initialized = 1; dev->ops->init(dev); -#if IS_ENABLED(CONFIG_HAVE_MONOTONIC_TIMER) +#if CONFIG(HAVE_MONOTONIC_TIMER) printk(BIOS_DEBUG, "%s init finished in %ld usecs\n", dev_path(dev), stopwatch_duration_usecs(&sw)); #endif @@ -1177,12 +1177,12 @@ void dev_initialize(void) printk(BIOS_INFO, "Initializing devices...\n"); -#if IS_ENABLED(CONFIG_ARCH_X86) +#if CONFIG(ARCH_X86) /* * Initialize EBDA area in ramstage if early * initialization is not done. */ - if (!IS_ENABLED(CONFIG_EARLY_EBDA_INIT)) + if (!CONFIG(EARLY_EBDA_INIT)) /* Ensure EBDA is prepared before Option ROMs. */ setup_default_ebda(); #endif diff --git a/src/device/device_const.c b/src/device/device_const.c index f60f749c49..6ce1d18c93 100644 --- a/src/device/device_const.c +++ b/src/device/device_const.c @@ -191,7 +191,7 @@ DEVTREE_CONST struct device *pcidev_path_on_root(pci_devfn_t devfn) * due tue complicated devicetree with topology * being manipulated on-the-fly. */ - if (IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AMDFAM10)) + if (CONFIG(NORTHBRIDGE_AMD_AMDFAM10)) return dev_find_slot(0, devfn); pci_domain = dev_find_path(NULL, DEVICE_PATH_DOMAIN); diff --git a/src/device/oprom/include/io.h b/src/device/oprom/include/io.h index 3a723bd056..09e25f031a 100644 --- a/src/device/oprom/include/io.h +++ b/src/device/oprom/include/io.h @@ -14,7 +14,7 @@ #ifndef __OPROM_IO_H__ #define __OPROM_IO_H__ -#if IS_ENABLED(CONFIG_ARCH_X86) +#if CONFIG(ARCH_X86) #include #else void outb(u8 val, u16 port); diff --git a/src/device/oprom/include/x86emu/fpu_regs.h b/src/device/oprom/include/x86emu/fpu_regs.h index a9b4893801..a872e19896 100644 --- a/src/device/oprom/include/x86emu/fpu_regs.h +++ b/src/device/oprom/include/x86emu/fpu_regs.h @@ -102,7 +102,7 @@ struct x86_fpu_registers { #endif /* X86_FPU_SUPPORT */ -#if IS_ENABLED(CONFIG_X86EMU_DEBUG) +#if CONFIG(X86EMU_DEBUG) # define DECODE_PRINTINSTR32(t,mod,rh,rl) \ DECODE_PRINTF(t[(mod<<3)+(rh)]); # define DECODE_PRINTINSTR256(t,mod,rh,rl) \ diff --git a/src/device/oprom/include/x86emu/regs.h b/src/device/oprom/include/x86emu/regs.h index 51e9719b3c..7640c78896 100644 --- a/src/device/oprom/include/x86emu/regs.h +++ b/src/device/oprom/include/x86emu/regs.h @@ -278,7 +278,7 @@ typedef struct { u32 mode; volatile int intr; /* mask of pending interrupts */ volatile int debug; -#if IS_ENABLED(CONFIG_X86EMU_DEBUG) +#if CONFIG(X86EMU_DEBUG) int check; u16 saved_ip; u16 saved_cs; diff --git a/src/device/oprom/include/x86emu/x86emu.h b/src/device/oprom/include/x86emu/x86emu.h index a5d436af94..fa23e55cd3 100644 --- a/src/device/oprom/include/x86emu/x86emu.h +++ b/src/device/oprom/include/x86emu/x86emu.h @@ -43,7 +43,7 @@ #include #include -#if IS_ENABLED(CONFIG_X86EMU_DEBUG) +#if CONFIG(X86EMU_DEBUG) #define DEBUG #endif @@ -153,7 +153,7 @@ void X86EMU_setMemBase(void *base, size_t size); void X86EMU_exec(void); void X86EMU_halt_sys(void); -#if IS_ENABLED(CONFIG_X86EMU_DEBUG) +#if CONFIG(X86EMU_DEBUG) #define HALT_SYS() \ printf("halt_sys: in %s\n", __func__); \ X86EMU_halt_sys(); diff --git a/src/device/oprom/realmode/x86.c b/src/device/oprom/realmode/x86.c index 0b19d79269..a7631a1a84 100644 --- a/src/device/oprom/realmode/x86.c +++ b/src/device/oprom/realmode/x86.c @@ -212,7 +212,7 @@ static void setup_realmode_idt(void) write_idt_stub((void *)0xffe6e, 0x1a); } -#if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE) +#if CONFIG(FRAMEBUFFER_SET_VESA_MODE) vbe_mode_info_t mode_info; static int mode_info_valid; @@ -268,7 +268,7 @@ void vbe_set_graphics(void) } vbe_set_mode(&mode_info); -#if IS_ENABLED(CONFIG_BOOTSPLASH) +#if CONFIG(BOOTSPLASH) struct jpeg_decdata *decdata; unsigned char *jpeg = cbfs_boot_map_with_leak("bootsplash.jpg", CBFS_TYPE_BOOTSPLASH, @@ -349,7 +349,7 @@ void run_bios(struct device *dev, unsigned long addr) realmode_call(addr + 0x0003, num_dev, 0xffff, 0x0000, 0xffff, 0x0, 0x0); printk(BIOS_DEBUG, "... Option ROM returned.\n"); -#if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE) +#if CONFIG(FRAMEBUFFER_SET_VESA_MODE) if ((dev->class >> 8)== PCI_CLASS_DISPLAY_VGA) vbe_set_graphics(); #endif @@ -383,7 +383,7 @@ int asmlinkage interrupt_handler(u32 intnumber, cs = cs_ip >> 16; flags = stackflags; -#if IS_ENABLED(CONFIG_REALMODE_DEBUG) +#if CONFIG(REALMODE_DEBUG) printk(BIOS_DEBUG, "oprom: INT# 0x%x\n", intnumber); printk(BIOS_DEBUG, "oprom: eax: %08x ebx: %08x ecx: %08x edx: %08x\n", eax, ebx, ecx, edx); diff --git a/src/device/oprom/realmode/x86_interrupts.c b/src/device/oprom/realmode/x86_interrupts.c index 3600200d39..2629ab9166 100644 --- a/src/device/oprom/realmode/x86_interrupts.c +++ b/src/device/oprom/realmode/x86_interrupts.c @@ -210,7 +210,7 @@ int int1a_handler(void) break; } -#if IS_ENABLED(CONFIG_REALMODE_DEBUG) +#if CONFIG(REALMODE_DEBUG) printk(BIOS_DEBUG, "0x%x: bus %d devfn 0x%x reg 0x%x val 0x%x\n", func, bus, devfn, reg, X86_ECX); #endif diff --git a/src/device/oprom/yabel/biosemu.c b/src/device/oprom/yabel/biosemu.c index a77157f077..1c94d92230 100644 --- a/src/device/oprom/yabel/biosemu.c +++ b/src/device/oprom/yabel/biosemu.c @@ -52,7 +52,7 @@ #include #include "compat/rtas.h" -#if IS_ENABLED(CONFIG_X86EMU_DEBUG_TIMINGS) +#if CONFIG(X86EMU_DEBUG_TIMINGS) struct mono_time zero; #endif @@ -87,44 +87,44 @@ biosemu(u8 *biosmem, u32 biosmem_size, struct device * dev, unsigned long rom_ad { u8 *rom_image; int i = 0; -#if IS_ENABLED(CONFIG_X86EMU_DEBUG) +#if CONFIG(X86EMU_DEBUG) debug_flags = 0; -#if IS_ENABLED(CONFIG_X86EMU_DEBUG_JMP) +#if CONFIG(X86EMU_DEBUG_JMP) debug_flags |= DEBUG_JMP; #endif -#if IS_ENABLED(CONFIG_X86EMU_DEBUG_TRACE) +#if CONFIG(X86EMU_DEBUG_TRACE) debug_flags |= DEBUG_TRACE_X86EMU; #endif -#if IS_ENABLED(CONFIG_X86EMU_DEBUG_PNP) +#if CONFIG(X86EMU_DEBUG_PNP) debug_flags |= DEBUG_PNP; #endif -#if IS_ENABLED(CONFIG_X86EMU_DEBUG_DISK) +#if CONFIG(X86EMU_DEBUG_DISK) debug_flags |= DEBUG_DISK; #endif -#if IS_ENABLED(CONFIG_X86EMU_DEBUG_PMM) +#if CONFIG(X86EMU_DEBUG_PMM) debug_flags |= DEBUG_PMM; #endif -#if IS_ENABLED(CONFIG_X86EMU_DEBUG_VBE) +#if CONFIG(X86EMU_DEBUG_VBE) debug_flags |= DEBUG_VBE; #endif -#if IS_ENABLED(CONFIG_X86EMU_DEBUG_INT10) +#if CONFIG(X86EMU_DEBUG_INT10) debug_flags |= DEBUG_PRINT_INT10; #endif -#if IS_ENABLED(CONFIG_X86EMU_DEBUG_INTERRUPTS) +#if CONFIG(X86EMU_DEBUG_INTERRUPTS) debug_flags |= DEBUG_INTR; #endif -#if IS_ENABLED(CONFIG_X86EMU_DEBUG_CHECK_VMEM_ACCESS) +#if CONFIG(X86EMU_DEBUG_CHECK_VMEM_ACCESS) debug_flags |= DEBUG_CHECK_VMEM_ACCESS; #endif -#if IS_ENABLED(CONFIG_X86EMU_DEBUG_MEM) +#if CONFIG(X86EMU_DEBUG_MEM) debug_flags |= DEBUG_MEM; #endif -#if IS_ENABLED(CONFIG_X86EMU_DEBUG_IO) +#if CONFIG(X86EMU_DEBUG_IO) debug_flags |= DEBUG_IO; #endif #endif -#if IS_ENABLED(CONFIG_X86EMU_DEBUG_TIMINGS) +#if CONFIG(X86EMU_DEBUG_TIMINGS) /* required for i915tool compatible output */ zero.microseconds = 0; #endif @@ -345,7 +345,7 @@ biosemu(u8 *biosmem, u32 biosmem_size, struct device * dev, unsigned long rom_ad * some boot device status in AX (see PNP BIOS Spec Section 3.3 */ DEBUG_PRINTF_CS_IP("Option ROM Exit Status: %04x\n", M.x86.R_AX); -#if IS_ENABLED(CONFIG_X86EMU_DEBUG) +#if CONFIG(X86EMU_DEBUG) DEBUG_PRINTF("Exit Status Decode:\n"); if (M.x86.R_AX & 0x100) { // bit 8 DEBUG_PRINTF diff --git a/src/device/oprom/yabel/compat/functions.c b/src/device/oprom/yabel/compat/functions.c index 1cebdf0a5a..fa1b6b7cf6 100644 --- a/src/device/oprom/yabel/compat/functions.c +++ b/src/device/oprom/yabel/compat/functions.c @@ -45,7 +45,7 @@ #define VMEM_SIZE (1024 * 1024) /* 1 MB */ -#if !IS_ENABLED(CONFIG_YABEL_DIRECTHW) +#if !CONFIG(YABEL_DIRECTHW) #if CONFIG_YABEL_VIRTMEM_LOCATION u8* vmem = (u8 *) CONFIG_YABEL_VIRTMEM_LOCATION; #else @@ -63,7 +63,7 @@ void run_bios(struct device * dev, unsigned long addr) biosemu(vmem, VMEM_SIZE, dev, addr); -#if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE) +#if CONFIG(FRAMEBUFFER_SET_VESA_MODE) vbe_set_graphics(); #endif } @@ -73,7 +73,7 @@ unsigned long tb_freq = 0; u64 get_time(void) { u64 act = 0; -#if IS_ENABLED(CONFIG_ARCH_X86) +#if CONFIG(ARCH_X86) u32 eax, edx; __asm__ __volatile__( diff --git a/src/device/oprom/yabel/debug.h b/src/device/oprom/yabel/debug.h index 20db26127b..d93fc6e4c1 100644 --- a/src/device/oprom/yabel/debug.h +++ b/src/device/oprom/yabel/debug.h @@ -37,7 +37,7 @@ #include #include -#if IS_ENABLED(CONFIG_X86EMU_DEBUG_TIMINGS) +#if CONFIG(X86EMU_DEBUG_TIMINGS) extern struct mono_time zero; #endif extern u32 debug_flags; @@ -91,7 +91,7 @@ static inline void set_ci(void) {}; // set to enable tracing of JMPs in x86emu #define DEBUG_JMP 0x2000 -#if IS_ENABLED(CONFIG_X86EMU_DEBUG) +#if CONFIG(X86EMU_DEBUG) #define CHECK_DBG(_flag) if (debug_flags & _flag) @@ -99,7 +99,7 @@ static inline void set_ci(void) {}; // prints the CS:IP before the printout, NOTE: actually its CS:IP of the _next_ instruction // to be executed, since the x86emu advances CS:IP _before_ actually executing an instruction -#if IS_ENABLED(CONFIG_X86EMU_DEBUG_TIMINGS) +#if CONFIG(X86EMU_DEBUG_TIMINGS) #define DEBUG_PRINTF_CS_IP(_x...) DEBUG_PRINTF("[%08lx]%x:%x ", (current_time_from(&zero)).microseconds, M.x86.R_CS, M.x86.R_IP); DEBUG_PRINTF(_x); #else #define DEBUG_PRINTF_CS_IP(_x...) DEBUG_PRINTF("%x:%x ", M.x86.R_CS, M.x86.R_IP); DEBUG_PRINTF(_x); diff --git a/src/device/oprom/yabel/device.c b/src/device/oprom/yabel/device.c index 438485effb..4a50068faf 100644 --- a/src/device/oprom/yabel/device.c +++ b/src/device/oprom/yabel/device.c @@ -58,7 +58,7 @@ typedef struct { u64 size; } __packed assigned_address_t; -#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL) +#if CONFIG(PCI_OPTION_ROM_RUN_YABEL) /* coreboot version */ static void @@ -131,7 +131,7 @@ biosemu_dev_get_addr_info(void) } // store last entry index of translate_address_array taa_last_entry = taa_index - 1; -#if IS_ENABLED(CONFIG_X86EMU_DEBUG) +#if CONFIG(X86EMU_DEBUG) //dump translate_address_array printf("translate_address_array:\n"); translate_address_t ta; @@ -215,7 +215,7 @@ biosemu_dev_get_addr_info(void) } // store last entry index of translate_address_array taa_last_entry = taa_index - 1; -#if IS_ENABLED(CONFIG_X86EMU_DEBUG) +#if CONFIG(X86EMU_DEBUG) //dump translate_address_array printf("translate_address_array:\n"); translate_address_t ta; @@ -247,7 +247,7 @@ biosemu_add_special_memory(u32 start, u32 size) translate_address_array[taa_index].address_offset = 0; } -#if !IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL) +#if !CONFIG(PCI_OPTION_ROM_RUN_YABEL) // to simulate accesses to legacy VGA Memory (0xA0000-0xBFFFF) // we look for the first prefetchable memory BAR, if no prefetchable BAR found, // we use the first memory BAR @@ -309,7 +309,7 @@ biosemu_dev_get_device_vendor_id(void) { u32 pci_config_0; -#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL) +#if CONFIG(PCI_OPTION_ROM_RUN_YABEL) pci_config_0 = pci_read_config32(bios_device.dev, 0x0); #else pci_config_0 = @@ -371,7 +371,7 @@ biosemu_dev_check_exprom(unsigned long rom_base_addr) memcpy(&pci_ds, (void *) (rom_base_addr + pci_ds_offset), sizeof(pci_ds)); clr_ci(); -#if IS_ENABLED(CONFIG_X86EMU_DEBUG) +#if CONFIG(X86EMU_DEBUG) DEBUG_PRINTF("PCI Data Structure @%lx:\n", rom_base_addr + pci_ds_offset); dump((void *) &pci_ds, sizeof(pci_ds)); @@ -435,7 +435,7 @@ biosemu_dev_init(struct device * device) DEBUG_PRINTF("%s\n", __func__); memset(&bios_device, 0, sizeof(bios_device)); -#if !IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL) +#if !CONFIG(PCI_OPTION_ROM_RUN_YABEL) bios_device.ihandle = of_open(device_name); if (bios_device.ihandle == 0) { DEBUG_PRINTF("%s is no valid device!\n", device_name); @@ -446,7 +446,7 @@ biosemu_dev_init(struct device * device) bios_device.dev = device; #endif biosemu_dev_get_addr_info(); -#if !IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL) +#if !CONFIG(PCI_OPTION_ROM_RUN_YABEL) biosemu_dev_find_vmem_addr(); biosemu_dev_get_puid(); #endif @@ -463,7 +463,7 @@ biosemu_dev_translate_address(int type, unsigned long * addr) { int i = 0; translate_address_t ta; -#if !IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL) +#if !CONFIG(PCI_OPTION_ROM_RUN_YABEL) /* we don't need this hack for coreboot... we can access legacy areas */ //check if it is an access to legacy VGA Mem... if it is, map the address //to the vmem BAR and then translate it... diff --git a/src/device/oprom/yabel/device.h b/src/device/oprom/yabel/device.h index f67a388300..8e8450a1ed 100644 --- a/src/device/oprom/yabel/device.h +++ b/src/device/oprom/yabel/device.h @@ -83,7 +83,7 @@ typedef struct { typedef struct { u8 bus; u8 devfn; -#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL) +#if CONFIG(PCI_OPTION_ROM_RUN_YABEL) struct device* dev; #else u64 puid; @@ -105,7 +105,7 @@ typedef struct { } biosemu_device_t; typedef struct { -#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL) +#if CONFIG(PCI_OPTION_ROM_RUN_YABEL) unsigned long info; #else u8 info; @@ -149,7 +149,7 @@ u8 biosemu_dev_translate_address(int type, unsigned long * addr); static inline void out32le(void *addr, u32 val) { -#if IS_ENABLED(CONFIG_ARCH_X86) || IS_ENABLED(CONFIG_ARCH_ARM) +#if CONFIG(ARCH_X86) || CONFIG(ARCH_ARM) *((u32*) addr) = cpu_to_le32(val); #else asm volatile ("stwbrx %0, 0, %1"::"r" (val), "r"(addr)); @@ -160,7 +160,7 @@ static inline u32 in32le(void *addr) { u32 val; -#if IS_ENABLED(CONFIG_ARCH_X86) || IS_ENABLED(CONFIG_ARCH_ARM) +#if CONFIG(ARCH_X86) || CONFIG(ARCH_ARM) val = cpu_to_le32(*((u32 *) addr)); #else asm volatile ("lwbrx %0, 0, %1":"=r" (val):"r"(addr)); @@ -171,7 +171,7 @@ in32le(void *addr) static inline void out16le(void *addr, u16 val) { -#if IS_ENABLED(CONFIG_ARCH_X86) || IS_ENABLED(CONFIG_ARCH_ARM) +#if CONFIG(ARCH_X86) || CONFIG(ARCH_ARM) *((u16*) addr) = cpu_to_le16(val); #else asm volatile ("sthbrx %0, 0, %1"::"r" (val), "r"(addr)); @@ -182,7 +182,7 @@ static inline u16 in16le(void *addr) { u16 val; -#if IS_ENABLED(CONFIG_ARCH_X86) || IS_ENABLED(CONFIG_ARCH_ARM) +#if CONFIG(ARCH_X86) || CONFIG(ARCH_ARM) val = cpu_to_le16(*((u16*) addr)); #else asm volatile ("lhbrx %0, 0, %1":"=r" (val):"r"(addr)); diff --git a/src/device/oprom/yabel/interrupt.c b/src/device/oprom/yabel/interrupt.c index 67abe81aa5..ea2a8036aa 100644 --- a/src/device/oprom/yabel/interrupt.c +++ b/src/device/oprom/yabel/interrupt.c @@ -362,7 +362,7 @@ handleInt1a(void) DEBUG_PRINTF_INTR("%s(): function: %x: PCI Find Device\n", __func__, M.x86.R_AX); /* FixME: support SI != 0 */ -#if IS_ENABLED(CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES) +#if CONFIG(YABEL_PCI_ACCESS_OTHER_DEVICES) dev = dev_find_device(M.x86.R_DX, M.x86.R_CX, 0); if (dev != 0) { DEBUG_PRINTF_INTR @@ -403,7 +403,7 @@ handleInt1a(void) offs = M.x86.R_DI; DEBUG_PRINTF_INTR("%s(): function: %x: PCI Config Read from device: bus: %02x, devfn: %02x, offset: %02x\n", __func__, M.x86.R_AX, bus, devfn, offs); -#if IS_ENABLED(CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES) +#if CONFIG(YABEL_PCI_ACCESS_OTHER_DEVICES) dev = dev_find_slot(bus, devfn); DEBUG_PRINTF_INTR("%s(): function: %x: dev_find_slot() returned: %s\n", __func__, M.x86.R_AX, dev_path(dev)); @@ -427,7 +427,7 @@ handleInt1a(void) switch (M.x86.R_AX) { case 0xb108: M.x86.R_CL = -#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL) +#if CONFIG(PCI_OPTION_ROM_RUN_YABEL) pci_read_config8(dev, offs); #else (u8) rtas_pci_config_read(bios_device. @@ -442,7 +442,7 @@ handleInt1a(void) break; case 0xb109: M.x86.R_CX = -#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL) +#if CONFIG(PCI_OPTION_ROM_RUN_YABEL) pci_read_config16(dev, offs); #else (u16) rtas_pci_config_read(bios_device. @@ -457,7 +457,7 @@ handleInt1a(void) break; case 0xb10a: M.x86.R_ECX = -#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL) +#if CONFIG(PCI_OPTION_ROM_RUN_YABEL) pci_read_config32(dev, offs); #else (u32) rtas_pci_config_read(bios_device. @@ -495,7 +495,7 @@ handleInt1a(void) } else { switch (M.x86.R_AX) { case 0xb10b: -#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL) +#if CONFIG(PCI_OPTION_ROM_RUN_YABEL) pci_write_config8(bios_device.dev, offs, M.x86.R_CL); #else rtas_pci_config_write(bios_device.puid, 1, bus, @@ -507,7 +507,7 @@ handleInt1a(void) M.x86.R_CL); break; case 0xb10c: -#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL) +#if CONFIG(PCI_OPTION_ROM_RUN_YABEL) pci_write_config16(bios_device.dev, offs, M.x86.R_CX); #else rtas_pci_config_write(bios_device.puid, 2, bus, @@ -519,7 +519,7 @@ handleInt1a(void) M.x86.R_CX); break; case 0xb10d: -#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL) +#if CONFIG(PCI_OPTION_ROM_RUN_YABEL) pci_write_config32(bios_device.dev, offs, M.x86.R_ECX); #else rtas_pci_config_write(bios_device.puid, 4, bus, diff --git a/src/device/oprom/yabel/io.c b/src/device/oprom/yabel/io.c index b50a2f1cf8..7117a6eed4 100644 --- a/src/device/oprom/yabel/io.c +++ b/src/device/oprom/yabel/io.c @@ -47,7 +47,7 @@ #include -#if IS_ENABLED(CONFIG_YABEL_DIRECTHW) +#if CONFIG(YABEL_DIRECTHW) u8 my_inb(X86EMU_pioAddr addr) { u8 val; @@ -426,7 +426,7 @@ pci_cfg_read(X86EMU_pioAddr addr, u8 size) offs += (addr - 0xCFC); // if addr is not 0xcfc, the offset is moved accordingly DEBUG_PRINTF_INTR("%s(): PCI Config Read from device: bus: %02x, devfn: %02x, offset: %02x\n", __func__, bus, devfn, offs); -#if IS_ENABLED(CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES) +#if CONFIG(YABEL_PCI_ACCESS_OTHER_DEVICES) dev = dev_find_slot(bus, devfn); DEBUG_PRINTF_INTR("%s(): dev_find_slot() returned: %s\n", __func__, dev_path(dev)); @@ -446,7 +446,7 @@ pci_cfg_read(X86EMU_pioAddr addr, u8 size) HALT_SYS(); return 0; } else { -#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL) +#if CONFIG(PCI_OPTION_ROM_RUN_YABEL) switch (size) { case 1: rval = pci_read_config8(dev, offs); @@ -495,11 +495,11 @@ pci_cfg_write(X86EMU_pioAddr addr, u32 val, u8 size) printf ("Config write access invalid! PCI device %x:%x.%x, offs: %x\n", bus, devfn >> 3, devfn & 7, offs); -#if !IS_ENABLED(CONFIG_YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG) +#if !CONFIG(YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG) HALT_SYS(); #endif } else { -#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL) +#if CONFIG(PCI_OPTION_ROM_RUN_YABEL) switch (size) { case 1: pci_write_config8(bios_device.dev, offs, val); diff --git a/src/device/oprom/yabel/mem.c b/src/device/oprom/yabel/mem.c index 49b6c4f9b3..fa6959e0e4 100644 --- a/src/device/oprom/yabel/mem.c +++ b/src/device/oprom/yabel/mem.c @@ -41,10 +41,10 @@ #include "compat/time.h" #include -#if !IS_ENABLED(CONFIG_YABEL_DIRECTHW) || !IS_ENABLED(CONFIG_YABEL_DIRECTHW) +#if !CONFIG(YABEL_DIRECTHW) || !CONFIG(YABEL_DIRECTHW) // define a check for access to certain (virtual) memory regions (interrupt handlers, BIOS Data Area, ...) -#if IS_ENABLED(CONFIG_X86EMU_DEBUG) +#if CONFIG(X86EMU_DEBUG) static u8 in_check = 0; // to avoid recursion... static inline void DEBUG_CHECK_VMEM_READ(u32 _addr, u32 _rval) diff --git a/src/device/oprom/yabel/vbe.c b/src/device/oprom/yabel/vbe.c index 872ca15fbc..682bf00ba5 100644 --- a/src/device/oprom/yabel/vbe.c +++ b/src/device/oprom/yabel/vbe.c @@ -34,7 +34,7 @@ #include #include -#if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE) +#if CONFIG(FRAMEBUFFER_SET_VESA_MODE) #include #endif @@ -66,7 +66,7 @@ u8 *vbe_info_buffer = 0; u8 *biosmem; u32 biosmem_size; -#if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE) +#if CONFIG(FRAMEBUFFER_SET_VESA_MODE) static inline u8 vbe_prepare(void) { @@ -734,7 +734,7 @@ void vbe_set_graphics(void) vbe_get_mode_info(&mode_info); vbe_set_mode(&mode_info); -#if IS_ENABLED(CONFIG_BOOTSPLASH) +#if CONFIG(BOOTSPLASH) unsigned char *framebuffer = (unsigned char *) le32_to_cpu(mode_info.vesa.phys_base_ptr); DEBUG_PRINTF_VBE("FRAMEBUFFER: 0x%p\n", framebuffer); diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 2233ddca67..86c72b89ff 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -745,7 +745,7 @@ static int should_run_oprom(struct device *dev) if (should_run >= 0) return should_run; - if (IS_ENABLED(CONFIG_ALWAYS_RUN_OPROM)) { + if (CONFIG(ALWAYS_RUN_OPROM)) { should_run = 1; return should_run; } @@ -755,7 +755,7 @@ static int should_run_oprom(struct device *dev) */ should_run = display_init_required(); - if (!should_run && IS_ENABLED(CONFIG_CHROMEOS)) + if (!should_run && CONFIG(CHROMEOS)) should_run = vboot_wants_oprom(); if (!should_run) @@ -768,10 +768,10 @@ static int should_load_oprom(struct device *dev) /* If S3_VGA_ROM_RUN is disabled, skip running VGA option * ROMs when coming out of an S3 resume. */ - if (!IS_ENABLED(CONFIG_S3_VGA_ROM_RUN) && acpi_is_wakeup_s3() && + if (!CONFIG(S3_VGA_ROM_RUN) && acpi_is_wakeup_s3() && ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA)) return 0; - if (IS_ENABLED(CONFIG_ALWAYS_LOAD_OPROM)) + if (CONFIG(ALWAYS_LOAD_OPROM)) return 1; if (should_run_oprom(dev)) return 1; @@ -784,7 +784,7 @@ void pci_dev_init(struct device *dev) { struct rom_header *rom, *ram; - if (!IS_ENABLED(CONFIG_VGA_ROM_RUN)) + if (!CONFIG(VGA_ROM_RUN)) return; /* Only execute VGA ROMs. */ @@ -822,7 +822,7 @@ struct device_operations default_pci_ops_dev = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, -#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) +#if CONFIG(HAVE_ACPI_TABLES) .write_acpi_tables = pci_rom_write_acpi_tables, .acpi_fill_ssdt_generator = pci_rom_ssdt, #endif @@ -864,7 +864,7 @@ struct device_operations default_pci_ops_bus = { */ static struct device_operations *get_pci_bridge_ops(struct device *dev) { -#if IS_ENABLED(CONFIG_PCIX_PLUGIN_SUPPORT) +#if CONFIG(PCIX_PLUGIN_SUPPORT) unsigned int pcixpos; pcixpos = pci_find_capability(dev, PCI_CAP_ID_PCIX); if (pcixpos) { @@ -872,7 +872,7 @@ static struct device_operations *get_pci_bridge_ops(struct device *dev) return &default_pcix_ops_bus; } #endif -#if IS_ENABLED(CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT) +#if CONFIG(HYPERTRANSPORT_PLUGIN_SUPPORT) unsigned int htpos = 0; while ((htpos = pci_find_next_capability(dev, PCI_CAP_ID_HT, htpos))) { u16 flags; @@ -885,7 +885,7 @@ static struct device_operations *get_pci_bridge_ops(struct device *dev) } } #endif -#if IS_ENABLED(CONFIG_PCIEXP_PLUGIN_SUPPORT) +#if CONFIG(PCIEXP_PLUGIN_SUPPORT) unsigned int pciexpos; pciexpos = pci_find_capability(dev, PCI_CAP_ID_PCIE); if (pciexpos) { @@ -975,7 +975,7 @@ static void set_pci_ops(struct device *dev) goto bad; dev->ops = get_pci_bridge_ops(dev); break; -#if IS_ENABLED(CONFIG_CARDBUS_PLUGIN_SUPPORT) +#if CONFIG(CARDBUS_PLUGIN_SUPPORT) case PCI_HEADER_TYPE_CARDBUS: dev->ops = &default_cardbus_ops_bus; break; @@ -1534,7 +1534,7 @@ int get_pci_irq_pins(struct device *dev, struct device **parent_bdg) return target_pin; } -#if IS_ENABLED(CONFIG_PC80_SYSTEM) +#if CONFIG(PC80_SYSTEM) /** * Assign IRQ numbers. * @@ -1583,7 +1583,7 @@ void pci_assign_irqs(unsigned bus, unsigned slot, printk(BIOS_DEBUG, " Readback = %d\n", irq); #endif -#if IS_ENABLED(CONFIG_PC80_SYSTEM) +#if CONFIG(PC80_SYSTEM) /* Change to level triggered. */ i8259_configure_irq_trigger(pIntAtoD[line - 1], IRQ_LEVEL_TRIGGERED); diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c index 82d9a3056a..2dbfb51b5f 100644 --- a/src/device/pci_rom.c +++ b/src/device/pci_rom.c @@ -55,7 +55,7 @@ struct rom_header *pci_rom_probe(struct device *dev) if (rom_header) { printk(BIOS_DEBUG, "In CBFS, ROM address for %s = %p\n", dev_path(dev), rom_header); - } else if (!IS_ENABLED(CONFIG_ON_DEVICE_ROM_LOAD)) { + } else if (!CONFIG(ON_DEVICE_ROM_LOAD)) { printk(BIOS_DEBUG, "PCI Option ROM loading disabled " "for %s\n", dev_path(dev)); return NULL; @@ -65,7 +65,7 @@ struct rom_header *pci_rom_probe(struct device *dev) rom_address = pci_read_config32(dev, PCI_ROM_ADDRESS); if (rom_address == 0x00000000 || rom_address == 0xffffffff) { -#if IS_ENABLED(CONFIG_BOARD_EMULATION_QEMU_X86) +#if CONFIG(BOARD_EMULATION_QEMU_X86) if ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA) rom_address = 0xc0000; else @@ -151,7 +151,7 @@ struct rom_header *pci_rom_load(struct device *dev, * devices have a mismatch between the hardware and the ROM. */ if ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA) { -#if !IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS) +#if !CONFIG(MULTIPLE_VGA_ADAPTERS) extern struct device *vga_pri; /* Primary VGA device (device.c). */ if (dev != vga_pri) return NULL; /* Only one VGA supported. */ #endif @@ -174,7 +174,7 @@ struct rom_header *pci_rom_load(struct device *dev, } /* ACPI */ -#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) +#if CONFIG(HAVE_ACPI_TABLES) /* VBIOS may be modified after oprom init so use the copy if present. */ static struct rom_header *check_initialized(struct device *dev) @@ -182,7 +182,7 @@ static struct rom_header *check_initialized(struct device *dev) struct rom_header *run_rom; struct pci_data *rom_data; - if (!IS_ENABLED(CONFIG_VGA_ROM_RUN)) + if (!CONFIG(VGA_ROM_RUN)) return NULL; run_rom = (struct rom_header *)(uintptr_t)PCI_VGA_RAM_IMAGE_START; diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c index 44b5100742..c20981625e 100644 --- a/src/device/pciexp_device.c +++ b/src/device/pciexp_device.c @@ -426,19 +426,19 @@ static void pciexp_tune_dev(struct device *dev) return; /* Check for and enable Common Clock */ - if (IS_ENABLED(CONFIG_PCIEXP_COMMON_CLOCK)) + if (CONFIG(PCIEXP_COMMON_CLOCK)) pciexp_enable_common_clock(root, root_cap, dev, cap); /* Check if per port CLK req is supported by endpoint*/ - if (IS_ENABLED(CONFIG_PCIEXP_CLK_PM)) + if (CONFIG(PCIEXP_CLK_PM)) pciexp_enable_clock_power_pm(dev, cap); /* Enable L1 Sub-State when both root port and endpoint support */ - if (IS_ENABLED(CONFIG_PCIEXP_L1_SUB_STATE)) + if (CONFIG(PCIEXP_L1_SUB_STATE)) pciexp_config_L1_sub_state(root, dev); /* Check for and enable ASPM */ - if (IS_ENABLED(CONFIG_PCIEXP_ASPM)) + if (CONFIG(PCIEXP_ASPM)) pciexp_enable_aspm(root, root_cap, dev, cap); } diff --git a/src/device/root_device.c b/src/device/root_device.c index e006bf9137..f8e2907ce4 100644 --- a/src/device/root_device.c +++ b/src/device/root_device.c @@ -150,7 +150,7 @@ static void root_dev_reset(struct bus *bus) board_reset(); } -#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) +#if CONFIG(HAVE_ACPI_TABLES) static const char *root_dev_acpi_name(const struct device *dev) { return "\\_SB"; @@ -171,7 +171,7 @@ struct device_operations default_dev_ops_root = { .init = DEVICE_NOOP, .scan_bus = root_dev_scan_bus, .reset_bus = root_dev_reset, -#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) +#if CONFIG(HAVE_ACPI_TABLES) .acpi_name = root_dev_acpi_name, #endif }; -- cgit v1.2.3