From fedaac84da5bcfd035e0e348150db8cf3d800726 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 15 Dec 2019 21:37:38 +0200 Subject: AGESA,binaryPI: Enable lapic early for udelay() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I7200ac0256748d9372fc39be27b86d1c93b38321 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/37756 Tested-by: build bot (Jenkins) Reviewed-by: Michał Żygowski Reviewed-by: Angel Pons Reviewed-by: HAOUAS Elyes --- src/drivers/amd/agesa/bootblock.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/drivers/amd/agesa/bootblock.c') diff --git a/src/drivers/amd/agesa/bootblock.c b/src/drivers/amd/agesa/bootblock.c index 3763b98a3a..91fcc6b994 100644 --- a/src/drivers/amd/agesa/bootblock.c +++ b/src/drivers/amd/agesa/bootblock.c @@ -18,6 +18,7 @@ #include #include #include +#include #define EARLY_VMTRR_FLASH 6 @@ -33,6 +34,9 @@ asmlinkage void bootblock_c_entry(uint64_t base_timestamp) enable_pci_mmconf(); set_early_mtrrs(); + if (CONFIG(UDELAY_LAPIC)) + enable_lapic(); + bootblock_main_with_basetime(base_timestamp); } @@ -41,6 +45,9 @@ asmlinkage void ap_bootblock_c_entry(void) enable_pci_mmconf(); set_early_mtrrs(); + if (CONFIG(UDELAY_LAPIC)) + enable_lapic(); + void (*ap_romstage_entry)(void) = get_ap_entry_ptr(); ap_romstage_entry(); /* execution does not return */ halt(); -- cgit v1.2.3