From cd49cce7b70e80b4acc49b56bb2bb94370b4d867 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Tue, 5 Mar 2019 16:53:33 -0800 Subject: coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/drivers/amd/agesa/acpi_tables.c | 6 +++--- src/drivers/amd/agesa/cache_as_ram.S | 4 ++-- src/drivers/amd/agesa/def_callouts.c | 6 +++--- src/drivers/amd/agesa/eventlog.c | 2 +- src/drivers/amd/agesa/heapmanager.c | 2 +- src/drivers/amd/agesa/oem_s3.c | 4 ++-- src/drivers/amd/agesa/romstage.c | 2 +- src/drivers/amd/agesa/state_machine.c | 12 ++++++------ 8 files changed, 19 insertions(+), 19 deletions(-) (limited to 'src/drivers/amd') diff --git a/src/drivers/amd/agesa/acpi_tables.c b/src/drivers/amd/agesa/acpi_tables.c index 391345d4fe..4cafacf24d 100644 --- a/src/drivers/amd/agesa/acpi_tables.c +++ b/src/drivers/amd/agesa/acpi_tables.c @@ -22,9 +22,9 @@ /* Fields were removed from the structure and we cannot add them back * without new builds of the binaryPI blobs. */ -#if !IS_ENABLED(CONFIG_CPU_AMD_AGESA_BINARY_PI) || \ - IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_PI_00630F01) || \ - IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_PI_00730F01) +#if !CONFIG(CPU_AMD_AGESA_BINARY_PI) || \ + CONFIG(NORTHBRIDGE_AMD_PI_00630F01) || \ + CONFIG(NORTHBRIDGE_AMD_PI_00730F01) #define HAS_ACPI_SRAT TRUE #define HAS_ACPI_SLIT TRUE diff --git a/src/drivers/amd/agesa/cache_as_ram.S b/src/drivers/amd/agesa/cache_as_ram.S index 09302d7d0e..4f0bb3fd75 100644 --- a/src/drivers/amd/agesa/cache_as_ram.S +++ b/src/drivers/amd/agesa/cache_as_ram.S @@ -107,7 +107,7 @@ _cache_as_ram_setup: pushl %eax call romstage_main -#if IS_ENABLED(CONFIG_POSTCAR_STAGE) +#if CONFIG(POSTCAR_STAGE) /* We do not return. Execution continues with run_postcar_phase() * calling to chipset_teardown_car below. @@ -138,7 +138,7 @@ chipset_teardown_car: /* Register %esp is preserved in AMD_DISABLE_STACK. */ AMD_DISABLE_STACK -#if IS_ENABLED(CONFIG_POSTCAR_STAGE) +#if CONFIG(POSTCAR_STAGE) jmp *%esp diff --git a/src/drivers/amd/agesa/def_callouts.c b/src/drivers/amd/agesa/def_callouts.c index fe5101fc91..92ccff8b73 100644 --- a/src/drivers/amd/agesa/def_callouts.c +++ b/src/drivers/amd/agesa/def_callouts.c @@ -25,9 +25,9 @@ #include #include -#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_PI) -#if IS_ENABLED(CONFIG_ARCH_ROMSTAGE_X86_64) || \ - IS_ENABLED(CONFIG_ARCH_RAMSTAGE_X86_64) +#if CONFIG(NORTHBRIDGE_AMD_PI) +#if CONFIG(ARCH_ROMSTAGE_X86_64) || \ + CONFIG(ARCH_RAMSTAGE_X86_64) #error "FIXME: CALLOUT_ENTRY is UINT32 Data, not UINT Data" #endif #endif diff --git a/src/drivers/amd/agesa/eventlog.c b/src/drivers/amd/agesa/eventlog.c index cc65652033..6cfcde520b 100644 --- a/src/drivers/amd/agesa/eventlog.c +++ b/src/drivers/amd/agesa/eventlog.c @@ -48,7 +48,7 @@ static const char *HeapStatusStr[] = { const char *agesa_struct_name(int state) { -#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_OPENSOURCE) +#if CONFIG(CPU_AMD_AGESA_OPENSOURCE) if ((state < AMD_INIT_RECOVERY) || (state > AMD_IDENTIFY_DIMMS)) return undefined; diff --git a/src/drivers/amd/agesa/heapmanager.c b/src/drivers/amd/agesa/heapmanager.c index 2a76b69e59..a38696fc0f 100644 --- a/src/drivers/amd/agesa/heapmanager.c +++ b/src/drivers/amd/agesa/heapmanager.c @@ -26,7 +26,7 @@ #define BIOS_HEAP_SIZE 0x30000 #define BIOS_HEAP_START_ADDRESS 0x010000000 -#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) && (HIGH_MEMORY_SCRATCH < BIOS_HEAP_SIZE) +#if CONFIG(HAVE_ACPI_RESUME) && (HIGH_MEMORY_SCRATCH < BIOS_HEAP_SIZE) #error Increase HIGH_MEMORY_SCRATCH allocation #endif diff --git a/src/drivers/amd/agesa/oem_s3.c b/src/drivers/amd/agesa/oem_s3.c index ad193e15d8..586189b406 100644 --- a/src/drivers/amd/agesa/oem_s3.c +++ b/src/drivers/amd/agesa/oem_s3.c @@ -31,7 +31,7 @@ typedef enum { #define S3_DATA_MTRR_SIZE 0x1000 #define S3_DATA_NONVOLATILE_SIZE 0x1000 -#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) && \ +#if CONFIG(HAVE_ACPI_RESUME) && \ (S3_DATA_MTRR_SIZE + S3_DATA_NONVOLATILE_SIZE) > CONFIG_S3_DATA_SIZE #error "Please increase the value of S3_DATA_SIZE" #endif @@ -94,7 +94,7 @@ AGESA_STATUS OemS3LateRestore(AMD_S3_PARAMS *dataBlock) static int spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len) { -#if IS_ENABLED(CONFIG_SPI_FLASH) +#if CONFIG(SPI_FLASH) struct spi_flash flash; spi_init(); diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c index 9b4c50a15e..d5b20b76f9 100644 --- a/src/drivers/amd/agesa/romstage.c +++ b/src/drivers/amd/agesa/romstage.c @@ -28,7 +28,7 @@ #include #include -#if !IS_ENABLED(CONFIG_POSTCAR_STAGE) +#if !CONFIG(POSTCAR_STAGE) #error "Only POSTCAR_STAGE is supported." #endif #if HAS_LEGACY_WRAPPER diff --git a/src/drivers/amd/agesa/state_machine.c b/src/drivers/amd/agesa/state_machine.c index 15ea211f4b..c6e36b2259 100644 --- a/src/drivers/amd/agesa/state_machine.c +++ b/src/drivers/amd/agesa/state_machine.c @@ -29,7 +29,7 @@ #include -#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_OPENSOURCE) +#if CONFIG(CPU_AMD_AGESA_OPENSOURCE) #include "Dispatcher.h" #endif @@ -40,7 +40,7 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {PSO_END}; static void agesa_locate_image(AMD_CONFIG_PARAMS *StdHeader) { -#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_BINARY_PI) +#if CONFIG(CPU_AMD_AGESA_BINARY_PI) const char ModuleIdentifier[] = AGESA_ID; const void *agesa, *image; size_t file_size; @@ -62,7 +62,7 @@ void agesa_set_interface(struct sysinfo *cb) cb->StdHeader.CalloutPtr = GetBiosCallout; - if (IS_ENABLED(CONFIG_CPU_AMD_AGESA_BINARY_PI)) { + if (CONFIG(CPU_AMD_AGESA_BINARY_PI)) { agesa_locate_image(&cb->StdHeader); AMD_IMAGE_HEADER *image = (void *)(uintptr_t)cb->StdHeader.ImageBasePtr; @@ -78,10 +78,10 @@ AGESA_STATUS module_dispatch(AGESA_STRUCT_NAME func, { MODULE_ENTRY dispatcher; -#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_OPENSOURCE) +#if CONFIG(CPU_AMD_AGESA_OPENSOURCE) dispatcher = AmdAgesaDispatcher; #endif -#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_BINARY_PI) +#if CONFIG(CPU_AMD_AGESA_BINARY_PI) AMD_IMAGE_HEADER *image = (void *)(uintptr_t)StdHeader->ImageBasePtr; AMD_MODULE_HEADER *module = (void *)(uintptr_t)image->ModuleInfoOffset; dispatcher = module->ModuleDispatcher; @@ -339,7 +339,7 @@ static void amd_bs_dev_enable(void *arg) agesa_execute_state(cb, AMD_INIT_MID); /* FIXME */ - if (IS_ENABLED(CONFIG_AMD_SB_CIMX) && acpi_is_wakeup_s3()) + if (CONFIG(AMD_SB_CIMX) && acpi_is_wakeup_s3()) sb_After_Pci_Restore_Init(); } -- cgit v1.2.3