From 2ad8ab8e7b0d193e6ed8e9b2768cc3afd9ca7bc4 Mon Sep 17 00:00:00 2001 From: Marc Bertens Date: Fri, 4 Jun 2010 19:53:55 +0000 Subject: Fixes for Nokia IP530 and associated drivers. Signed-off-by: Marc Bertens Signed-off-by: Myles Watson Acked-by: Marc Bertens git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5609 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/drivers/dec/21143/21143pd.c | 70 ++++++++++++++++++++++++++++++++++++++ src/drivers/dec/21143/Makefile.inc | 2 ++ 2 files changed, 72 insertions(+) create mode 100644 src/drivers/dec/21143/21143pd.c create mode 100644 src/drivers/dec/21143/Makefile.inc (limited to 'src/drivers/dec') diff --git a/src/drivers/dec/21143/21143pd.c b/src/drivers/dec/21143/21143pd.c new file mode 100644 index 0000000000..e318a8d8df --- /dev/null +++ b/src/drivers/dec/21143/21143pd.c @@ -0,0 +1,70 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2010 Marc Bertens + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include +#include +#include +#include + +/** + * The following should be set in the mainboard-specific Kconfig file. + */ +#if (!defined(CONFIG_DEC21143_CACHE_LINE_SIZE) || \ + !defined(CONFIG_DEC21143_EXPANSION_ROM_BASE_ADDRESS) || \ + !defined(CONFIG_DEC21143_COMMAND_AND_STATUS_CONFIGURATION)) +#error "you must supply these values in your mainboard-specific Kconfig file" +#endif + +/* CONFIG_DEC21143_CACHE_LINE_SIZE try 0x00000000 if unsure */ +/* CONFIG_DEC21143_EXPANSION_ROM_BASE_ADDRESS try 0x00000000 if unsure */ +/* CONFIG_DEC21143_COMMAND_AND_STATUS_CONFIGURATION try 0x02800107 or 0x02800007 if unsure */ + +/** + * This driver take the values from Kconfig and load them in the registers + */ +static void dec_21143pd_enable( device_t dev ) +{ + printk( BIOS_DEBUG, "Init of DECchip 21143PD/TD Kconfig style\n"); + // Command and Status Configuration Register (Offset 0x04) + pci_write_config32( dev, 0x04, CONFIG_DEC21143_COMMAND_AND_STATUS_CONFIGURATION ); + printk( BIOS_DEBUG, "0x04 = %08x (07 01 80 02)\n", pci_read_config32(dev, 0x04) ); + // Cache Line Size Register (Offset 0x0C) + pci_write_config8( dev, 0x0C, CONFIG_DEC21143_CACHE_LINE_SIZE ); + printk( BIOS_DEBUG, "0x0c = %08x (00 80 00 00)\n", pci_read_config32(dev, 0x0C) ); + // Expansion ROM Base Address Register (Offset 0x30) + pci_write_config32( dev, 0x30, CONFIG_DEC21143_EXPANSION_ROM_BASE_ADDRESS ); + printk( BIOS_DEBUG, "0x30 = %08x (0x00000000)\n", pci_read_config32(dev, 0x30) ); + return; +} + +static struct device_operations dec_21143pd_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = dec_21143pd_enable, + .scan_bus = 0, +}; + +static const struct pci_driver dec_21143pd_driver __pci_driver = { + .ops = &dec_21143pd_ops, + .vendor = PCI_VENDOR_ID_DEC, + .device = PCI_DEVICE_ID_DEC_21142, +}; diff --git a/src/drivers/dec/21143/Makefile.inc b/src/drivers/dec/21143/Makefile.inc new file mode 100644 index 0000000000..dcba9cdc9b --- /dev/null +++ b/src/drivers/dec/21143/Makefile.inc @@ -0,0 +1,2 @@ +driver-$(CONFIG_DRIVERS_DEC_21143PD) += 21143pd.o + -- cgit v1.2.3