From 3ecfdbde14851b408b9f0dd4006c2f733731fedb Mon Sep 17 00:00:00 2001 From: York Yang Date: Wed, 14 Oct 2015 06:52:32 -0700 Subject: intel/fsp1_0: Use dummy microcode when calling FSP TempRamInit Pass in dummy microcode when calling FSP TempRamInit API. FSP will not do the microcode load and leave the work to coreboot. Ensure that BSP has been loaded a microcode before calling TempRamInit API, otherwise FSP will return error that No Valid Microcode Was Found. Change has been verified on fsp_baytrail and will be applied to rangeley. Change-Id: I8247c0503c8eb3d1c8eaa059632fb3a11c9daae9 Signed-off-by: York Yang Reviewed-on: http://review.coreboot.org/11895 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Paul Menzel --- src/drivers/intel/fsp1_0/Makefile.inc | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'src/drivers/intel/fsp1_0/Makefile.inc') diff --git a/src/drivers/intel/fsp1_0/Makefile.inc b/src/drivers/intel/fsp1_0/Makefile.inc index aac832b49e..2c972b4ede 100644 --- a/src/drivers/intel/fsp1_0/Makefile.inc +++ b/src/drivers/intel/fsp1_0/Makefile.inc @@ -21,17 +21,6 @@ romstage-$(CONFIG_ENABLE_MRC_CACHE) += fastboot_cache.c CPPFLAGS_common += -Isrc/drivers/intel/fsp1_0 -I$(objgenerated) -ifneq ($(cpu_microcode_bins),) -$(objgenerated)/microcode_size.h: $(obj)/cpu_microcode_blob.bin - printf "#define MICROCODE_REGION_LENGTH $(call file-size,$<)" > $@.tmp \ - && cmp $@.tmp $@ 2>/dev/null || mv $@.tmp $@ -else -$(objgenerated)/microcode_size.h: - printf "#define MICROCODE_REGION_LENGTH 0" > $@.tmp \ - && cmp $@.tmp $@ 2>/dev/null || mv $@.tmp $@ -endif - -cpu_incs-$(CONFIG_PLATFORM_USES_FSP1_0) += $(objgenerated)/microcode_size.h cpu_incs-$(CONFIG_USE_GENERIC_FSP_CAR_INC) += $(src)/drivers/intel/fsp1_0/cache_as_ram.inc ifeq ($(CONFIG_HAVE_FSP_BIN),y) -- cgit v1.2.3