From 654cc2fe109ea1be4d22447b3d0e6eb22a75b550 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Sun, 27 May 2018 13:52:28 +0200 Subject: {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate Change-Id: Ibc2392cd2a00fde3e15dda4d44c8b6874d7ac8a3 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/26574 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Werner Zeh --- src/drivers/intel/fsp1_0/cache_as_ram.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/drivers/intel/fsp1_0') diff --git a/src/drivers/intel/fsp1_0/cache_as_ram.inc b/src/drivers/intel/fsp1_0/cache_as_ram.inc index eb21348e2f..d08f582f82 100644 --- a/src/drivers/intel/fsp1_0/cache_as_ram.inc +++ b/src/drivers/intel/fsp1_0/cache_as_ram.inc @@ -112,7 +112,7 @@ fake_fsp_stack: CAR_init_params: .long dummy_microcode .long 0 - .long 0xFFFFFFFF - CACHE_ROM_SIZE + 1 /* Firmware Location */ + .long CACHE_ROM_BASE /* Firmware Location */ .long CACHE_ROM_SIZE /* Total Firmware Length */ CAR_init_stack: -- cgit v1.2.3