From fb032398d262ff7594c35c65b6f14897bb331a39 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Thu, 15 Jan 2015 15:28:46 -0800 Subject: spi: Add function to read flash status register Add a function that allows reading of the status register from the SPI chip. This can be used to determine whether write protection is enabled on the chip. BUG=chrome-os-partner:35209 BRANCH=haswell TEST=build and boot on peppy Signed-off-by: Duncan Laurie Reviewed-on: https://chromium-review.googlesource.com/240702 Reviewed-by: Shawn N (cherry picked from commit c58f17689162b291a7cdb57649a237de21b73545) Change-Id: Ib7fead2cc4ea4339ece322dd18403362c9c79c7d Signed-off-by: Patrick Georgi Original-Commit-Id: 9fbdf0d72892eef4a742a418a347ecf650c01ea5 Original-Change-Id: I2541b22c51e43f7b7542ee0f48618cf411976a98 Original-Signed-off-by: Duncan Laurie Original-Reviewed-on: https://chromium-review.googlesource.com/241128 Original-Reviewed-by: Shawn N Reviewed-on: http://review.coreboot.org/9730 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/drivers/spi/gigadevice.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/drivers/spi/gigadevice.c') diff --git a/src/drivers/spi/gigadevice.c b/src/drivers/spi/gigadevice.c index 9686ee9871..7f86b2b747 100644 --- a/src/drivers/spi/gigadevice.c +++ b/src/drivers/spi/gigadevice.c @@ -222,6 +222,7 @@ struct spi_flash *spi_flash_probe_gigadevice(struct spi_slave *spi, u8 *idcode) stm.flash.write = gigadevice_write; stm.flash.erase = spi_flash_cmd_erase; + stm.flash.status = spi_flash_cmd_status; #if CONFIG_SPI_FLASH_NO_FAST_READ stm.flash.read = spi_flash_cmd_read_slow; #else @@ -233,6 +234,7 @@ struct spi_flash *spi_flash_probe_gigadevice(struct spi_slave *spi, u8 *idcode) * params->sectors_per_block * params->nr_blocks; stm.flash.erase_cmd = CMD_GD25_SE; + stm.flash.status_cmd = CMD_GD25_RDSR; return &stm.flash; } -- cgit v1.2.3