From 8517f94bfd89175b47f2bbd004fe8fd0f6183528 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Thu, 12 Mar 2015 11:33:14 +0200 Subject: OxPCIe952: Fix read8/write8 argument MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This was missed in commit bde6d309 as the driver is not enabled in any configuration by default. Change-Id: I3d886531f5bcf013fc22ee0a1e8fa250d7c4c1a4 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/8660 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones --- src/drivers/uart/oxpcie.c | 5 +++-- src/drivers/uart/uart8250mem.c | 4 ++-- 2 files changed, 5 insertions(+), 4 deletions(-) (limited to 'src/drivers') diff --git a/src/drivers/uart/oxpcie.c b/src/drivers/uart/oxpcie.c index 76119d2702..d49170d5d7 100644 --- a/src/drivers/uart/oxpcie.c +++ b/src/drivers/uart/oxpcie.c @@ -34,11 +34,12 @@ static void oxford_oxpcie_enable(device_t dev) printk(BIOS_WARNING, "OXPCIe952: No UART resource found.\n"); return; } + void *bar0 = res2mmio(res, 0, 0); printk(BIOS_DEBUG, "OXPCIe952: Class=%x Revision ID=%x\n", - (read32(res->base) >> 8), (read32(res->base) & 0xff)); + (read32(bar0) >> 8), (read32(bar0) & 0xff)); printk(BIOS_DEBUG, "OXPCIe952: %d UARTs detected.\n", - (read32(res->base + 4) & 3)); + (read32(bar0 + 4) & 3)); printk(BIOS_DEBUG, "OXPCIe952: UART BAR: 0x%x\n", (u32)res->base); } diff --git a/src/drivers/uart/uart8250mem.c b/src/drivers/uart/uart8250mem.c index 5fbbeec66f..cb7070012b 100644 --- a/src/drivers/uart/uart8250mem.c +++ b/src/drivers/uart/uart8250mem.c @@ -36,12 +36,12 @@ static uint8_t uart8250_read(void *base, uint8_t reg) { - return read8((uintptr_t) (base + reg)); + return read8(base + reg); } static void uart8250_write(void *base, uint8_t reg, uint8_t data) { - write8((uintptr_t) (base + reg), data); + write8(base + reg, data); } static int uart8250_mem_can_tx_byte(void *base) -- cgit v1.2.3