From 07fe6184bc1d834377a91bfbe7e796d8027f1f24 Mon Sep 17 00:00:00 2001 From: Nicolas Boichat Date: Fri, 26 Jan 2018 14:37:16 +0800 Subject: chromeec: Add support for reading second battery info We share the same shared memory fields for both batteries. When the host wants to switch battery to read out, it will: - Set BTID (EC_ACPI_MEM_BATTERY_INDEX) to the required index - Wait for BITX (EC_MEMMAP_BATT_INDEX) to have the required value - Then fetch the data BRANCH=none BUG=b:65697620 TEST=Boot lux, both /sys/class/power_supply/BAT0 and BAT1 are present, data is valid. Change-Id: Ib06176e6ab4c45a899259f0917e6292121865ed6 Signed-off-by: Nicolas Boichat Reviewed-on: https://review.coreboot.org/23598 Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie --- src/ec/google/chromeec/acpi/emem.asl | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/ec/google/chromeec/acpi/emem.asl') diff --git a/src/ec/google/chromeec/acpi/emem.asl b/src/ec/google/chromeec/acpi/emem.asl index ba98831b73..982ec5bf89 100644 --- a/src/ec/google/chromeec/acpi/emem.asl +++ b/src/ec/google/chromeec/acpi/emem.asl @@ -30,6 +30,8 @@ TIN8, 8, // Temperature 8 TIN9, 8, // Temperature 9 Offset (0x10), FAN0, 16, // Fan Speed 0 +Offset (0x24), +BTVR, 8, // Battery structure version Offset (0x30), LIDS, 1, // Lid Switch State PBTN, 1, // Power Button Pressed @@ -45,6 +47,9 @@ BTEX, 1, // Battery Present BFDC, 1, // Battery Discharging BFCG, 1, // Battery Charging BFCR, 1, // Battery Level Critical +Offset (0x4d), +BTCN, 8, // Battery Count +BTIX, 8, // Battery index Offset (0x50), BTDA, 32, // Battery Design Capacity BTDV, 32, // Battery Design Voltage -- cgit v1.2.3