From 9ed10bff317097c42b1545279f88af95ca796ab0 Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Thu, 20 Feb 2020 13:38:49 +1100 Subject: ec/google/chromeec: Introduce SKU_ID helpers The following introduces helpers that, by default, accommodate a larger SKU id space. The following is the rational for that: Allow INT32_MAX SKU id encodings beyond UINT8_MAX. This allows for the SKU id to accommodate up to 4 bytes however we reserve the highest bit for SKU_UNKNOWN to be encoded. However, the legacy UINT8_MAX encoding is supported by leveraging the Kconfig by overriding it with the legacy max of 0xff. Follow ups migrate boards to this common framework. V.2: Fixup array size && drop sku_id SKU_UNKNOWN check and pass whatever is set to userspace as firmware doesn't care about the value. V.3: Use SPDX-License header. BUG=b:149348474 BRANCH=none TEST=tested on hatch. Change-Id: I805b25465a3b4ee3dc0cbda5feb9e9ea2493ff9e Signed-off-by: Edward O'Callaghan Reviewed-on: https://review.coreboot.org/c/coreboot/+/39018 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/ec/google/chromeec/Kconfig | 5 +++++ src/ec/google/chromeec/Makefile.inc | 3 +++ src/ec/google/chromeec/ec.h | 3 +++ src/ec/google/chromeec/ec_skuid.c | 36 ++++++++++++++++++++++++++++++++++++ 4 files changed, 47 insertions(+) create mode 100644 src/ec/google/chromeec/ec_skuid.c (limited to 'src/ec/google/chromeec') diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig index b33864f09e..554677c387 100644 --- a/src/ec/google/chromeec/Kconfig +++ b/src/ec/google/chromeec/Kconfig @@ -100,6 +100,11 @@ config EC_GOOGLE_CHROMEEC_SPI_CHIP hex default 0x0 +config EC_GOOGLE_CHROMEEC_SKUID + def_bool n + help + Provides common routine for reporting the skuid to ChromeOS. + config EC_GOOGLE_CHROMEEC_BOARDNAME depends on EC_GOOGLE_CHROMEEC string "Chrome EC board name for EC" diff --git a/src/ec/google/chromeec/Makefile.inc b/src/ec/google/chromeec/Makefile.inc index 4994480baa..b57333e202 100644 --- a/src/ec/google/chromeec/Makefile.inc +++ b/src/ec/google/chromeec/Makefile.inc @@ -6,6 +6,9 @@ romstage-$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDID) += ec_boardid.c ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDID) += ec_boardid.c smm-$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDID) += ec_boardid.c +romstage-$(CONFIG_EC_GOOGLE_CHROMEEC_SKUID) += ec_skuid.c +ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_SKUID) += ec_skuid.c + bootblock-y += ec.c bootblock-$(CONFIG_EC_GOOGLE_CHROMEEC_LPC) += ec_lpc.c ramstage-y += ec.c crosec_proto.c vstore.c diff --git a/src/ec/google/chromeec/ec.h b/src/ec/google/chromeec/ec.h index 7341636819..f13b5105c2 100644 --- a/src/ec/google/chromeec/ec.h +++ b/src/ec/google/chromeec/ec.h @@ -89,6 +89,9 @@ int google_chromeec_cbi_get_fw_config(uint32_t *fw_config); int google_chromeec_cbi_get_dram_part_num(char *buf, size_t bufsize); int google_chromeec_cbi_get_oem_name(char *buf, size_t bufsize); +uint32_t google_chromeec_get_board_sku(void); +const char *google_chromeec_smbios_system_sku(void); + /* MEC uses 0x800/0x804 as register/index pair, thus an 8-byte resource. */ #define MEC_EMI_BASE 0x800 #define MEC_EMI_SIZE 8 diff --git a/src/ec/google/chromeec/ec_skuid.c b/src/ec/google/chromeec/ec_skuid.c new file mode 100644 index 0000000000..f8fc203c47 --- /dev/null +++ b/src/ec/google/chromeec/ec_skuid.c @@ -0,0 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2020 The coreboot project Authors. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include +#include +#include +#include +#include + +#define SKU_UNKNOWN 0xFFFFFFFF + +uint32_t google_chromeec_get_board_sku(void) +{ + MAYBE_STATIC_NONZERO uint32_t sku_id = SKU_UNKNOWN; + + if (sku_id != SKU_UNKNOWN) + return sku_id; + + if (google_chromeec_cbi_get_sku_id(&sku_id)) + sku_id = SKU_UNKNOWN; + + return sku_id; +} + +const char *google_chromeec_smbios_system_sku(void) +{ + static char sku_str[14]; /* sku{0..2147483647} */ + uint32_t sku_id = google_chromeec_get_board_sku(); + snprintf(sku_str, sizeof(sku_str), "sku%u", sku_id); + return sku_str; +} -- cgit v1.2.3