From 1a5f1c89d752bf906f7428f96c5ff624a1baba97 Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Wed, 31 Oct 2018 08:06:12 +0100
Subject: cpu/amd: Use common AMD's MSR

This Phase #2 follows the CL done on Phase #1 (Change-Id: I0236e0960cd)

Change-Id: Ia296e1f9073b45c9137d17fbef29ce4fdfabcb7c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29369
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/include/cpu/amd/msr.h | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/include/cpu/amd/msr.h')

diff --git a/src/include/cpu/amd/msr.h b/src/include/cpu/amd/msr.h
index 46ec70d3c9..5d7b5e4fda 100644
--- a/src/include/cpu/amd/msr.h
+++ b/src/include/cpu/amd/msr.h
@@ -58,6 +58,8 @@
 #define PSTATE_3_MSR			0xC0010067
 #define PSTATE_4_MSR			0xC0010068
 
+#define MSR_PATCH_LOADER		0xC0010020
+
 #define MSR_COFVID_STS			0xC0010071
 #define MSR_CSTATE_ADDRESS		0xC0010073
 #define OSVW_ID_Length			0xC0010140
-- 
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